CPU

Difference Between Assembly Language Pseudo Instructions and Assembly Instructions

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Difference Between Assembly Language Pseudo Instructions and Assembly Instructions

Instructions control the operation of machine code during program execution and are the basis for CPU execution, making programming, compiling, and execution effective.Pseudo instructions do not directly control the runtime machine but guide the translation program on how to generate machine instruction code. Instruction Statements Each instruction statement generates executable instruction code (i.e., target code) … Read more

A Comprehensive Guide to Assembly Language

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A Comprehensive Guide to Assembly Language

Scan the QR code to follow “Finger Tips Sound” and learn together, grow together. Part1 Definition of Content 1.1 Definition of Data Segment Assembly language programs are written in segments, generally defining data in the data segment and the program in the code segment. The syntax for defining a segment is as follows: segment_name SEGMENT … Read more

Introduction to Assembly Language Tutorial

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Introduction to Assembly Language Tutorial

(Click the public account above to quickly follow) Source: Ruan Yifeng’s Blog http://www.ruanyifeng.com/blog/2018/01/assembly-language-primer.html Learning programming is essentially learning high-level languages, which are computer languages designed for humans. However, computers do not understand high-level languages; they must be converted into binary code by a compiler in order to run. Knowing a high-level language does not equate … Read more

Introduction to Assembly Language

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Introduction to Assembly Language

Friends with a bit of computer knowledge must know that computers only recognize 0s and 1s. Back in the day, to write a program, one had to use 0s and 1s, haha, cool right? The admiration for programmers likely originated from that time. Later, people found it very inconvenient to write programs using just 0s … Read more

SiFive P870 High-Performance CPU: Exploring the Future of RISC-V

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SiFive P870 High-Performance CPU: Exploring the Future of RISC-V

At Hot Chips 2023, SiFive introduced the new high-performance P870 RISC-V core and its automotive equivalent, the P870-A core, discussing the overall state of RISC-V, its previous generation cores, and future development directions. The P870 and P870-A RISC-V cores are new additions to SiFive’s Performance series, compatible with the RISC-V RVA23 profile, and are successors … Read more

Enhancing Programmers’ Self-Cultivation

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Enhancing Programmers' Self-Cultivation

Table of Contents 1.1 Starting with Hello World 1.2 The Essence Remains Unchanged 1.3 The Higher You Stand, The Further You See 1.4 What the Operating System Does 1.4.1 Don’t Let the CPU Doze Off 1.5 What to Do When Memory is Insufficient 1.5.1 About Isolation 1.5.2 Segmentation 1.5.3 Paging 1.6 Many Hands Make Light … Read more

Understanding Multitasking OS: Cooperative vs Preemptive

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Understanding Multitasking OS: Cooperative vs Preemptive

Computer memory, is the temporary storage area of a computer, which holds the data and instructions needed by the Central Processing Unit (CPU). The instructions, which refer to specific operations of the processor, are defined by the Instruction Set Architecture, which typically includes four types of instructions: arithmetic, logic, data movement, and control flow. Before … Read more

Essential Linux Performance Tools for Programmers

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Essential Linux Performance Tools for Programmers

In actual development, there are times when we receive monitoring alarms for certain services, such as high CPU usage or high memory usage. At this point, we log into the server to investigate. This blog will cover knowledge regarding: Linux performance tools. A Simulation of Online Issue Investigation Background: After the service has been running … Read more

History and Future of RISC-V

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History and Future of RISC-V

In 2010, the Berkeley research team aimed to design a CPU. However, Intel’s licensing for x86 was very strict, ARM’s instruction set licensing was expensive, and MIPS, SPARC, and Open Power also required their respective company licenses. With limited options, the Berkeley research team decided to start from scratch to design a new instruction set. … Read more

RISC-V: The Future Core of Technology

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RISC-V: The Future Core of Technology

Click the blue text above to subscribe! 1 Last night, the news broke that ARM has suspended its cooperation with Huawei, yet major financial news outlets have collectively remained silent on the matter; the deeper meaning of this is left for you to interpret! Now, let’s talk about the ARM architecture. Currently, Qualcomm, Apple, and … Read more