Learning Methods for Mastering Armv8/Armv9 Architecture

Learning Methods for Mastering Armv8/Armv9 Architecture

Click the card below to follow Arm Technology Academy This article is selected from the Jishu column “Arm Selection” and will briefly discuss how beginners can efficiently learn about Arm v8/Arm v9 architecture. Do you want to get rich overnight? Have lots of money, buy many houses, have a relaxed job with no pressure, avoid … Read more

Exploring Future Chip Trends: Mastering RISC-V Architecture Quickly!

Exploring Future Chip Trends: Mastering RISC-V Architecture Quickly!

RISC-V (pronounced risk-five) architecture is an open-source instruction set architecture (ISA) that has gained attention in recent years for its flexibility, modularity, and scalability. In this article, we will explore the main aspects of RISC-V architecture, including its design principles, instruction set, register file, memory model, privilege levels, and implementation methods. We will also discuss … Read more

Evolution of Arm Mali GPU Architecture

Evolution of Arm Mali GPU Architecture

Click the card below to follow Arm Technology Academy This article is selected from the Extreme Technology column “Arm Technology Blog” and will help you better learn about the evolution of the Arm Mali GPU architecture. At the beginning of the year, I had the opportunity to research the evolution of the ARM Mali GPU … Read more

From Confusion to Mastery: Understanding Armv8-A and Armv9-A Architectures

From Confusion to Mastery: Understanding Armv8-A and Armv9-A Architectures

Whether you are an IC design engineer, verification engineer, FPGA engineer, architecture engineer, or a student in microelectronics, you must be familiar with the ARM architecture. Choosing the Arm architecture is a very suitable option because its advantages include easy commercial promotion, the ability to utilize Arm’s mature ecosystem, and use Arm’s mature IP. Coupled … Read more

Armv8 Cache Coherency Solution: MOESI Protocol

Armv8 Cache Coherency Solution: MOESI Protocol

Click the card below to follow Arm Technology Academy This article is organized by the WeChat public account Arm Selected, and mainly shares the related content of Armv8 Cache Coherency Solution: MOESI protocol. 1. MOESI State Definitions The Armv8 architecture uses the MOESI protocol to maintain data consistency between multiple cores. The MOESI protocol describes … Read more

Understanding Armv8/Armv9 TrustZone Technology

Understanding Armv8/Armv9 TrustZone Technology

Click the blue "Arm Selected" at the top left and select "Set as Star" 1. Background With the development of the times and the advancement of technology, the trend for security needs has become increasingly evident. ARM has been continuously adjusting and updating its new architectures, many of which are related to security. Below are … Read more

Efficient Learning Methods for Armv8/Armv9 Architecture

Efficient Learning Methods for Armv8/Armv9 Architecture

Learning Methods Scan to FollowLearn Embedded Together, learn and grow together Learning the Arm architecture versions v8 and v9 requires a deep understanding of several key concepts and mechanisms, including GIC (interrupt controller), exception handling, MMU (memory management unit), memory management, cache, TrustZone security architecture, security, and exclusive mechanisms. Here is an efficient learning method … Read more

Introduction to ARMv8 Memory Types and Attributes

Introduction to ARMv8 Memory Types and Attributes

In ARMv8, memory is divided into two types:Normal memory and Device memory, where Normal memory is suitable for most of the memory in the system, while Device memory is used for memory utilized by peripherals. 1. Normal Memory The Normal memory type attributes apply to most memory in the system. It indicates that the architecture … Read more

ARMv8/v9 GIC Interrupt Handling: Priority, Preemption, and Nesting

ARMv8/v9 GIC Interrupt Handling: Priority, Preemption, and Nesting

ver0.3 Introduction In previous articles, we introduced the ARM architecture’s interrupt controller GIC, which maintains a state machine for each interrupt signal. This interrupt state machine supports four states: Inactive, Pending, Active, and Active and Pending. The GIC maintains the status of each signal through internal registers and performs state transitions under relevant trigger conditions. … Read more

ARMv8-A Architecture and Processors

ARMv8-A Architecture and Processors

The ARM architecture can be traced back to 1985, but it has not remained static. Instead, it has undergone massive development since the early ARM cores, with each step adding features and functionalities: ARMv4 and Earlier Versions These early processors only used the ARM 32-bit instruction set. ARMv4T The ARMv4T architecture added the Thumb 16-bit … Read more