Comparison of 9 Type-C Card Readers: Which One Can Solve Multi-Device Transfer Issues?

Comparison of 9 Type-C Card Readers: Which One Can Solve Multi-Device Transfer Issues?

Need to transfer data urgently but have no solution?OTG card readers can solve this problem!In modern digital life, data transfer difficulties are common.Today, we will review several popular card readers. 01Pisen Type-C OTG TF Card Reader Interface Type: Uses a Type-C interface, compatible with both smartphones and tablets, making connections convenient and quick.Transfer Speed: Complies … Read more

Huawei Ascend 910B Outperforms H20, 910C Approaches H100!

Huawei Ascend 910B Outperforms H20, 910C Approaches H100!

The performance comparison between Huawei’s Ascend 910 series (including 910, 910B, 910C) and NVIDIA’s AI chips (such as A100, H100, B200) is a complex issue that involves multiple dimensions, including computing power, energy efficiency, ecosystem, and application scenarios. 1. Performance Comparison of Huawei Ascend 910 Series and NVIDIA Chips Overview of Huawei Ascend 910 Series … Read more

Microcontroller: Choosing Between DAC and PWM for Audio Output? Test Data Reveals the Answer!

Microcontroller: Choosing Between DAC and PWM for Audio Output? Test Data Reveals the Answer!

Hello everyone, I am Xiao Chen. Today, let’s discuss a practical topic: how can microcontrollers output audio signals? Currently, there are two mainstream solutions: directly using a DAC (Digital-to-Analog Converter) or using PWM (Pulse Width Modulation) for analog output. Both methods have their pros and cons, and many beginners can easily get confused. Today, I … Read more

Serial Peripheral Interface (SPI) Protocol: Principles, Architecture, and Applications

Serial Peripheral Interface (SPI) Protocol: Principles, Architecture, and Applications

Author | Confused Zhen Produced by | Automotive Electronics and Software #01Introduction to the Serial Peripheral Interface (SPI) Protocol SPI is a multi-master or master-slave, four-wire, full-duplex synchronous serial communication protocol, which means that data can be sent and received simultaneously.SPI was developed by Motorola as a protocol for synchronous serial communication, allowing full-duplex communication … Read more

FPGA Digital Barometer Design: I2C Driver for BMP280 and Dynamic LED Display

FPGA Digital Barometer Design: I2C Driver for BMP280 and Dynamic LED Display

1. Experiment Task Task: Based on the STEP-MAX10M08 core board and STEP BaseBoard V4.0 baseboard, complete the design of a digital barometer and observe the debugging results. Requirements: Drive the digital barometer on the baseboard, displaying BMP280 information on an 8-digit scanning LED display. Analysis: Use FPGA programming to drive the I2C interface of the … Read more

Meizu Note 16 Official Appearance Announcement: Unisoc Chip + LCD Screen, Strikingly Similar to Huawei!

Meizu Note 16 Official Appearance Announcement: Unisoc Chip + LCD Screen, Strikingly Similar to Huawei!

In the current smartphone design landscape, which is mired in homogenization, the release of Meizu Note 16 is like a stone thrown into a calm lake, creating ripples. This product, positioned as a “national phone”, draws inspiration from the ancient Chinese “caisson” structure, showcasing unique cultural depth in its design while also sparking in-depth discussions … Read more

Creating Your Own Chip (4) – PDM Section

Creating Your Own Chip (4) - PDM Section

Word count: 821, reading time approximately 5 minutes PDM (Pulse Density Modulation) is an interface commonly used to connect digital microphones, which have become a standard peripheral in modern electronic devices. It can be considered an essential interface in SoC chips. First, let’s understand the timing of the PDM interface. 1 Interface Timing The digital … Read more

Interdisciplinary Insights on Chip and System Design in the Era of Large Models

Interdisciplinary Insights on Chip and System Design in the Era of Large Models

Content Summary1. Computational Demands of Large Models: The need for massive parameter storage, dense matrix operations, and frequent memory access drives chip architecture towards high performance and low latency;2. Challenges in Chip Design: The imbalance between chip computing power and bandwidth, with the “memory wall” becoming the biggest bottleneck to development;3. Innovative Chip Architecture Design: … Read more