On November 13, 2025, Arm Technology (China) Co., Ltd. officially launched the next-generation NPU IP – “Zhouyi” X3 in Shanghai.
Image | Highlights of the “Zhouyi” X3 NPU IP;
Source: Arm Technology
As the first major product under the “All in AI” product strategy, the “Zhouyi” X3 is based on the latest DSP+DSA architecture designed specifically for large models, achieving significant breakthroughs in key metrics such as computing power, energy efficiency, and bandwidth: it offers configurable computing power from 8 to 80 FP8 TFLOPS, with a single-core bandwidth of up to 256GB/s, a 30%-50% performance improvement for CNN models, and a tenfold increase in AIGC large model capabilities compared to the previous generation. The computing power utilization during the Prefill phase reaches 72%, and with the support of the self-developed decompression hardware WDC, the effective bandwidth utilization during the Decode phase exceeds 100%.
Behind this series of performance improvements is Arm Technology’s differentiated strategy built on a deep analysis of technology and market trends.
From a technical perspective, the “Zhouyi” X3 achieves a balance of flexibility and efficiency through the DSP+DSA integrated architecture, and it opens up a progressive quantization path from FP16 to W2A8 through a multi-precision fusion computing system, breaking through the energy efficiency bottleneck of the traditional von Neumann architecture with an extreme “data localization” storage architecture.
From a market perspective, the company adopts a strategy of “key breakthroughs and gradient coverage,” capturing the high-value automotive electronics market, which currently has the highest willingness to pay, while also meeting the diverse computing power needs from AIoT to infrastructure through modular architecture design, and leaving ample space for future algorithm evolution with the concept of “architecture balance”.
This close combination of technological foresight and market pragmatism enables the “Zhouyi” X3 to achieve a leap in hardware parameters and build a sustainable competitive advantage in commercial implementation.
After the press conference, further communication with Arm Technology’s technical team provided key insights from Product Director Bao Minqi and Senior Product Manager Ye Bin, which helped us understand the underlying logic behind a series of technical decisions for the “Zhouyi” X3.
Image | Interview with Arm Technology’s Product Director Bao Minqi by Weifeng Network;
Source: Arm Technology
Where is Heterogeneous Computing Heading?
In a technical interview, Arm Technology’s Product Director Bao Minqi elaborated on the development path of heterogeneous computing. “Currently, the heterogeneous computing we focus on is mainly reflected at the system level, that is, the collaborative work of CPU, NPU, and GPU. This architecture aims to address the preprocessing and postprocessing stages of AI tasks where NPU is not adept, with the core challenge being to build a unified software framework that can efficiently schedule different architectures.”
“In the future, heterogeneity will further penetrate into individual NPUs, forming ‘computing power heterogeneity,'” Bao Minqi added. “By integrating computing units with different performances and characteristics within the NPU, we can pursue high computing power while also considering the flexibility required by large models. If this internal heterogeneity is scheduled by a single software stack, it will be very efficient; conversely, if multiple independent NPUs are used, it will lead to energy efficiency losses due to software stack redundancy and data movement.”
This concept of “computing power heterogeneity” is fully reflected in the DSP+DSA integrated architecture of the “Zhouyi” X3. Bao Minqi analyzed the limitations of a pure DSA architecture: “Pure DSA uses hardware-fixed pipelines, which are highly efficient but extremely inflexible. Once the algorithm flow changes (for example, the access pattern of KV Cache changes from ‘one two three four five’ to ‘one three five four’), the original hardware design cannot adapt.”
The introduction of DSP is precisely to efficiently handle those computing tasks that, while accounting for less than 20% of the total AI computation, are highly versatile. “Without a programmable unit like DSP as a supplement, many flexible computations that should be handled by NPU would have to revert to the CPU (in some product solutions, RISC-V CPU takes on such loads). This would consume a lot of resources from the main CPU, contradicting the original design intention of NPU as an independent heterogeneous computing power.”
How to Choose the Precision Path?
In terms of quantization precision, the “Zhouyi” X3 supports multi-precision fusion computing including int4/int8/int16/int32/fp4/fp8/fp16/bf16/fp32, and has proactively laid out the W4A8 and W2A8 technology paths.
In this regard, Bao Minqi pointed out: “The current bandwidth limitations of mobile phones (about 16-32GB/s) and user expectations for real-time responses together constitute the driving force for lower bit quantization in the industry. We have observed that platforms like Hugging Face have already introduced models such as W3A16, and we expect mainstream manufacturers to accelerate this trend starting next year.”
Regarding the precision selection strategy, Bao Minqi made an important point: “In terms of technology selection, priority should be given to ensuring ‘usability.’ For example, to facilitate rapid deployment, one might prefer to use FP8 floating-point operations rather than being fixated on INT8 efficiency at the cost of iterative agility. More importantly, large models are agents that need to evolve in real-time, and their ‘intelligence’ relies on rapid deployment and continuous updates, which is fundamentally different from the iterative model of traditional CNNs.”
This idea was confirmed by Arm Technology’s Senior Product Manager Ye Bin: “We have researched a certain international manufacturer’s chip, whose NPU utilization rate is 20%-30%, much higher than that of other brands. The reason is that they deployed FP16 floating-point NPU several years ago, significantly lowering the deployment threshold. Domestic manufacturers have low NPU utilization rates precisely because the usage threshold is too high, while this international manufacturer provides a successful reference case.”
Regarding the specific landing prospects of W2A8, Bao Minqi stated: “W2A8 is a key technology path supporting models like 7B for deployment on mobile and other edge devices. Although the specific landing time for W2 quantization is still constrained by algorithm optimization and toolchain maturity, the hard constraints of edge computing power and bandwidth determine that this is an inevitable development direction. We will continue to collaborate with chip manufacturers and algorithm companies to ensure that low-bit quantization meets usability requirements while improving performance.”
Image | Interview with Arm Technology’s Senior Product Manager Ye Bin by Weifeng Network;
Source: Arm Technology
How to Break Through the Storage Energy Efficiency Bottleneck?
In terms of storage architecture design, the “Zhouyi” X3 adopts an extreme “data localization” strategy.
In this regard, Bao Minqi explained in detail: “What we adopt is not in-memory computing; the core design philosophy is extreme ‘data localization.’ Unlike NVIDIA’s GPGPU, which relies on large-capacity caches and external DDR solutions, we meticulously plan L1/L2/L3 multi-level storage, striving to process data at the closest level to the computing unit (especially L1), minimizing data movement to directly enhance energy efficiency.”
This design, while increasing the complexity of software in variable lifecycle management, is seen by Bao Minqi as the only way to break through the energy efficiency bottleneck under the classic von Neumann architecture: “Because the process determines about 80% of the energy efficiency limit, the remaining 20% of optimization space entirely depends on how to minimize the bandwidth and power consumption of data access, and data localization is the most effective architectural strategy to achieve this goal.”
In terms of specific implementation, the storage architecture of the “Zhouyi” X3 has been upgraded from Global Memory in X2 to L2 Memory.
In this regard, Bao Minqi revealed: “In fact, in the current architecture, the same layer has both Global Memory and L2 Cache. The Global Memory mainly stores large data streams such as input feature maps, while the L2 Cache is used for weight sharing and temporary data exchange between various computing blocks. This specialization not only improves bandwidth utilization efficiency but also enhances the overall data scheduling efficiency through storage structure optimization.”
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How to Build the Software Ecosystem?
The Compass AI software platform equipped with the “Zhouyi” X3 has achieved open-source for core components such as the Parser and quantization tools.
Ye Bin emphasized: “We are always actively promoting two major strategies: open-source and openness. In terms of open-source, our Parser and quantization tools are both open, with the open-source implementation of the quantization tool currently being particularly advanced in the industry. We insist on promoting quantization open-source because we see that whether in the CNN or large model era, model tuning (such as W4A8, W4A16 configurations) heavily relies on quantization technology, and this process often involves a huge workload, so open-source can effectively help developers reduce their workload.”
In terms of openness, Ye Bin added: “We are committed to breaking the black-box nature of toolchains. Unlike many closed toolchains, our platform supports flexible export and visualization of intermediate results, allowing developers to clearly view IR structures, precision changes, and performance data, achieving transparent analysis and debugging throughout the process.”
Additionally, the platform supports custom operator development. Bao Minqi illustrated: “When a customer discovers that the ‘matrix multiplication’ in their model structure can be combined with the subsequent ‘activation function,’ this combination will form a new, custom operator in the computation graph. This new operator is not part of the standard framework but is created for extreme performance or specific model structures. We must provide this customization capability, allowing customers to define these unique computation patterns as an efficient, integrated new operator.”
Ye Bin added another important value of this capability: “Protecting the core intellectual property of customers. We have some practical cases where customers use the custom operator feature to encapsulate their proprietary algorithms. This way, they can achieve high performance on our hardware without disclosing the specific implementation details of their algorithms to any third party, including us.”
What is the Path to Market Breakthrough?
The “Zhouyi” X3 precisely targets four core markets: infrastructure, smart vehicles, mobile terminals, and smart IoT.
From the perspective of market demand, Bao Minqi analyzed in depth: “From the current market, the AI computing power that users are truly willing to pay for is mainly in the automotive field, where people are willing to pay a premium for higher computing power chips. However, in the AI PC and edge large model fields, NPU has not been effectively applied.”
Regarding the automotive electronics market, which is a key focus, Bao Minqi shared specific observations: “Currently, the automotive chip market is mainly dominated by Horizon and NVIDIA. In terms of technology routes, we do not deliberately pursue uniqueness but rather follow the mainstream trends of the industry. For example, in terms of quantization solutions, we adapt our development based on NVIDIA’s similar technologies, which makes it easier to gain recognition from conservative and stable automotive customers.”
He further pointed out, “Automakers generally tend to follow industry leaders in technology selection. Just like structured sparsity and other technologies, although their actual value is yet to be verified, they gain favor from automakers simply because they are adopted by NVIDIA.”
Additionally, in the face of the current market situation where 70% of customers are in a wait-and-see attitude, Bao Minqi proposed a clear breakthrough strategy: “Currently, there are two clear computing power reference benchmarks in the market: in the AI PC field, the 45TOPS defined by Microsoft through the Windows system has become an industry factual standard; in the robotics field, the 100TOPS computing power provided by NVIDIA’s Orin chip is regarded as entry-level configuration.”
However, he emphasized that simply following these standards often puts companies in a passive position. “Therefore, we are actively guiding some forward-looking customers to implement differentiated strategies—appropriately laying out in key areas to establish competitive advantages during the technology window period, avoiding falling into a completely passive situation when the industry matures,” Bao Minqi said.
In the currently popular robotics market, although the total computing power of the “Zhouyi” X3 current solution is 80 FP8 TFLOPS, Bao Minqi explained: “The computing power issue you mentioned needs to be viewed from two levels: first, the 80 FP8 TFLOPS computing power benchmark is based on a conservative estimate of the current process and frequency (1-1.25GHz); if more advanced processes are used, the frequency can be increased to 1.4-1.5GHz, and the computing power will correspondingly increase. More importantly, our NPU adopts a modular architecture design, where a single computing cluster provides 80 FP8 TFLOPS of computing power, and through multiple cluster combinations, computing power can be linearly expanded (for example, dual clusters can reach 160T).”
On this issue, Ye Bin added from the perspective of the 30% of customers with clear demands: “These 30% of customers with clear demands have a core understanding of their market and customer base. Their decision-making logic is direct and pragmatic—laying out based on the current visible market demand. On this basis, we further help these customers build resilient technical architectures, meaning that even if the market fluctuates or the technical direction adjusts in the future, they can still quickly adapt and seize market opportunities.”
How to Address Algorithm Uncertainty?
In the face of uncertainties in cutting-edge algorithms such as VLA and world models, Bao Minqi shared the “architecture balance” strategy of the “Zhouyi” X3: “When dealing with uncertainties in cutting-edge algorithms like VLA and world models, we adopt an ‘architecture balance’ strategy. Although the underlying core of these models is still Transformer-type computations, their technical paths and commercial landing times have not yet converged—evident from Meta’s adjustment of technical routes to the automotive industry’s proposal of ‘VLA without L’ and other concepts.”
“Therefore, the design of the ‘Zhouyi’ X3 NPU does not aggressively bet on a specific direction but chooses a relatively moderate balance point in key parameters such as computing power ratio and storage bandwidth,” Bao Minqi explained.
This strategic capability comes from a dual-drive approach: “On one hand, we continuously track top academic papers, analyzing changes in computational patterns in emerging algorithms to predict future workloads; on the other hand, we deeply study the chip architectures of leading companies like NVIDIA, interpreting the logic behind their bandwidth ratios and design decisions. By cross-validating the consistency of trends between academic frontiers and industrial practices, we can ensure that the NPU architecture design is neither overly advanced nor lagging behind. Academic research typically leads industry implementation by 3-5 years, providing us with a sufficient time window to build a robust yet forward-looking computing platform.”
In Conclusion
The launch of the “Zhouyi” X3 marks a new development stage for Arm Technology in the field of edge AI computing. From system-level heterogeneity to deep integration of chip cores, from fixed-point computation priority to floating-point computation priority, and from closed toolchains to open-source ecosystems, it demonstrates Arm Technology’s profound insights and forward-looking layout regarding the development trends of AI technology.
Driven by the dual forces of software-hardware collaboration and an open ecosystem, the “Zhouyi” X3 is expected to become a key engine for promoting large-scale deployment of edge intelligence, providing a solid computing power foundation for the intelligent transformation of various industries.
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Note: The cover image of this article is sourced from Freepik, self-made by the author, and publicly authorized media materials.
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