PCB Design Rules: A Bilingual Reference
Electrical (电气规则)
Clearance: Safety distance rulesShort Circuit: Short circuit rulesUnRouted Net: Unrouted network rulesUnConnected Pin: Unconnected pin rules
Routing (布线规则)
Width: Trace width rulesRouting Topology: Routing topology layout rulesRouting Priority: Routing priority rulesRouting Layers: Routing layer rulesRouting Corners: Trace corner rulesRouting Via Style: Routing via style rulesFan out Control: Fanout control rulesDifferential Pairs Routing: Differential pair routing rules
SMT (表贴焊盘规则)
SMD To Corner: Minimum distance rules for SMD pads to corner tracesSMD To Plane: Minimum distance rules for SMD pads to power layer viasSMD Neck Down: SMD pad neck reduction rules
Mask (阻焊层规则)
Solder Mask Expansion: Solder mask shrinkage rulesPaste Mask Expansion: Paste mask shrinkage rules
Plane (电源层规则)
Power Plane Connect Style: Power plane connection type rulesPower Plane Clearance: Power plane safety distance rulesPolygon Connect Style: Pad and copper connection type rules
TestPoint (测试点规则)
Testpoint Style: Testpoint style rulesTestPoint Usage: Testpoint usage rules
Manufacturing (工业规则)
Minimum Annular Ring: Minimum width rules for pad copper rings to prevent pad detachment.Acute Angle: Acute angle limitation rulesHole Size: Hole size limitation rulesLayer Pairs: Layer pairing setup rules, defining the starting and ending layers for all drilled electrical symbols (pads and vias).Hole To Hole Clearance: Hole-to-hole clearance rulesMinimum SolderMask Sliver: Minimum solder mask gap violation rulesSilkscreen Over Component Pads: Silkscreen distance rules from component padsSilk To Silk Clearance: Silkscreen spacing rulesNet Antennae: Network antenna rules
High Speed (高频电路规则)
Parallel Segment: Parallel copper trace segment spacing limitation rulesLength: Network length limitation rulesMatched Net Lengths: Network length matching rulesDaisy Chain Stub Length: Daisy chain branch length limitation rulesVias Under SMD: Via limitation rules under SMD padsMaximum Via Count: Maximum via count limitation rules
Placement (元件布置规则)
Room Definition: Component collection definition rulesComponent Clearance: Component spacing limitation rulesComponent Orientations: Component placement orientation rulesPermitted Layers: Allowed component placement layer rulesNets To Ignore: Network ignore rulesHeight: Height rules
Signal Integrity (信号完整性规则)
Signal Stimulus: Signal excitation rulesUndershoot-Falling Edge: Negative undershoot overshoot limitation rulesUndershoot-Rising Edge: Positive undershoot overshoot limitation rulesImpedance: Impedance limitation rulesSignal Top Value: High-level signal rulesSignal Base Value: Low-level signal rulesFlight Time-Rising Edge: Rising edge flight time rulesFlight Time-Falling Edge: Falling edge flight time rulesSlope-Rising Edge: Rising edge time rulesSlope-Falling Edge: Falling edge time rulesSupply Nets: Power network rules
Some screenshots from electronic books
【Complete Set of Hardware Learning Materials】
