Introduction to Intel FPGA Agilex 7 Series (Part 1)

There is already a wealth of information available on AMD FPGA (Xilinx), including application articles and reference designs, which demonstrates the high popularity of Xilinx devices in the Chinese market. In contrast, the external resources related to Intel FPGA (Altera) are quite scarce. Altera experienced a significant downturn for several years before and after being acquired by Intel. However, in the past two years, Intel FPGA products have been gaining traction in data center applications, leveraging Intel’s advantages in the data center industry. With the introduction of other products in the Agilex 7 series, especially the release of the F-tile and M-series, it is expected to make a significant impact in the communications sector in the future.

Introduction to Intel FPGA Agilex 7 Series (Part 1)

The latest generation of Intel FPGA products is based on Intel’s 10nm process / Intel 7 technology, known as the Agilex 7 series. This series is further divided into F-series, I-series, and M-series. The basic architecture is shown in the image above, with a complete fabric die in the center, which includes standard I/O and programmable logic resources. The various types of high-speed interface dies, connected via EMIB, are located on the left and right, referred to as Tiles, which include P/E/F/R tiles. The advantage of this architecture is that it allows for flexible combinations of various tiles while keeping the fabric die unchanged, enabling rapid deployment of chips tailored for different industry applications. The downside is that it can be unclear to most people what tiles are paired on either side, making it difficult to discern just from the chip model.

Compared to the previous generation products, Arria 10/Stratix 10, the most significant change is the re-layout of GPIOs to the top and bottom sides of the FPGA, unlike the A10/S10 where GPIOs were distributed within the fabric die. This layout benefits the fabric by creating a large, uninterrupted resource block, greatly facilitating the layout and routing of the entire system. To address the routing issue from GPIO to the center of the fabric, the M-series has also introduced NOC bus technology, which, although it comes later than Versal, is still better than having none.

Agilex 7 features a special on-chip functional module called eSRAM (as shown in the upper left corner of the image), which can be simply understood as having functionality similar to external QDR SRAM, allowing simultaneous read and write operations with very low latency. However, it has a small capacity, and not every Agilex 7 device includes it; for example, medium-scale devices like 012/014 have it, while smaller and larger devices like 006 and 027 do not…

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