Click the card below to follow Arm Technology Academy This article is selected from the Extreme Art column “Lingdong MM32MCU” and is authorized to be reprinted from the WeChat public account Lingdong MM32MCU. Previous articles introduced Cortex-M0 Interrupt Control and System Control (Part 1), Cortex-M0 Interrupt Control and System Control (Part 2), Cortex-M0 Interrupt Control … Read more
Click the image to view the details of the conference. The OS can support multitasking, performing context switching periodically and handling tasks in parallel architecture. A crash in a single task does not affect the entire system. Context switching requires a timer to interrupt program execution; the SysTick timer can provide the necessary clock pulses, … Read more
Click the card below to follow Arm Technology Academy This article is selected from the “灵动MM32MCU” column of Extreme Technology, authorized to be reprinted from the WeChat public account 灵动MM32MCU. Previous articles introduced Cortex-M0 Interrupt Control and System Control (Part 1), Cortex-M0 Interrupt Control and System Control (Part 2), this article will continue to introduce … Read more
Click the card below to follow Arm Technology Academy This article is selected from the Extreme Technology column “Dynamic MM32MCU” and is authorized to be reprinted from the WeChat public account Dynamic MM32MCU.This series will introduce the knowledge of Cortex-M0 interrupt control. A few days ago, a customer asked a question: If the frequency of … Read more
This article is reprinted from the Jishu Community Jishu Column: Lingdong MM32 MCU The Cortex-M0 System Control Block (SCB) is one of the main modules of the core peripherals, providing system control and execution information, including configuration, control, and reporting system exceptions. To improve software efficiency, CMSIS simplifies the representation of SCB registers. In CMSIS, … Read more
1. Program Execution Methods Polling System Refers to a method where all hardware is initialized first during program execution, followed by a main program that runs in an infinite loop, executing required functions in sequence. The polling system is a simple and reliable method, generally suitable for situations where tasks need to be executed in … Read more
Definition First, let’s look at the definitions of both in the authoritative guide for Cortex-M. 1 Exception Definition According to the authoritative guide for Cortex-M, an exception refers to an event that can alter the normal program flow. When an exception occurs, the processor pauses the currently executing task and executes a dedicated program to … Read more
To add more functionality to the PCI device driver we wrote, we simulated a test PCIe device on QEMU, allowing us to implement features we wanted, such as DMA and interrupts. For the specific implementation of this PCIe test device, please refer to How to Implement a PCIe Device in QEMU. The Vendor ID and … Read more
Today, while working on an intelligent voice control module, I wanted to reinforce my knowledge of serial communication. Upon reviewing my previous notes, I found them lacking in detail, so I decided to write a new article explaining the principles of serial communication, covering both hardware and software implementations clearly. This will thoroughly clarify the … Read more
Concept of DMA DMA (Direct Memory Access) allows data transfer without direct control from the CPU. It creates a direct pathway for data transfer between RAM and I/O devices, significantly improving CPU efficiency. There are several methods for UART data reception: the interrupt mode of UART isthe most commonly used data transmission method in microcontrollers, … Read more