In various industries and applications, many FPGA designs can often be seen. A very common phenomenon is that designers often use complex finite state machines (FSM) to implement functions such as I²C, SPI, and GPIO timing control.

However, as functionalities continue to expand, these FSMs often become very large and difficult to maintain, significantly increasing the difficulty of debugging and verification on the system board. Moreover, these FSMs not only need to undergo simulation verification but also require re-validation after being implemented on the board—this is time-consuming, labor-intensive, and not flexible enough.

When I implement such interfaces in FPGA, my common approach is to directly use MicroBlaze V to replace complex FSMs. By adding a lightweight soft processor, I can complete control functions with simple C programs. This makes the entire logic more flexible, intuitive, and easier to modify, especially when the inevitable “last-minute changes” occur at the end of the project, significantly reducing risks.

Some may worry: will adding MicroBlaze V lead to a surge in resource usage?

In fact, MicroBlaze V is highly configurable and can be tailored to application requirements, significantly reducing resource consumption.

This article aims to explore in depth the configuration options of MicroBlaze V and their impact on resource usage.

MicroBlaze V Architecture Options: Different Pipeline Depths

MicroBlaze V is based on the RISC-V RV32 architecture, but it can not only configure peripherals and interfaces but also choose instruction set extensions and internal processor architecture, such as pipeline depth.

The architecture configuration of MicroBlaze V in Vivado is mainly reflected in the pipeline levels:

• Area configuration: 3-stage pipeline — resource minimization

• Throughput configuration: 4-stage pipeline — focusing on computational throughput

• Performance configuration: 5-stage pipeline — aimed at high performance

• Frequency configuration: 8-stage pipeline — optimizing the highest operating frequency

It is important to note that if the program runs on high-latency external storage (such as DDR), instruction fetching may exceed one cycle, thus memory hierarchy and tightly coupled memory/cache are crucial. I will discuss cache configuration in detail in the next article.

Optional ISA Extensions for MicroBlaze V

MicroBlaze V supports enabling various optional RISC-V extensions, each of which affects area, performance, and flexibility:

1. Code Compression (C) – Code Compression (C Extension)

32-bit instructions are replaced with 16-bit short instructions

Program size can be reduced by 25–35%

Almost no performance loss

Hardware requires very few resources, making it very cost-effective

2. Integer Multiplier (M) – Integer Multiplication/Division (M Extension)

Accelerates operations involving multiplication and division

Will use a certain number of FPGA DSP resources

3. Floating Point (F) – Single Precision Floating Point (F Extension)

Provides hardware floating-point operations

Significant performance improvement

Resource consumption increases significantly (LUT/FF)

4. Atomic Operations (A) – Atomic Operations (A Extension)

Implements atomic read-modify-write instructions

Suitable for RTOS, multithreading, and locking mechanisms

Logic overhead is small

5. Bit Manipulation (Zba/Zbb/Zbc/Zbs) – Bit Manipulation Extensions (Zba/Zbb/Zbc/Zbs)

Accelerates operations such as shifting, rotating, bit counting, and extraction

Very valuable for encryption and DSP applications

Enabling more extensions means more resource usage, so I conducted a comprehensive analysis and implementation of different configurations, comparing resource consumption.

MicroBlaze V Synthesis Results (Partial)

The following shows the LUT, FF, BRAM, and DSP usage for the main ISA combinations under four pipeline configurations. Some trends can be observed from the results:

Area

Configuration	LUT	FF	BRAM	DSP
RV32I	823	449	8	0
RV32IC	1033	488	8	0
RV32IM	1130	581	8	4
RV32IMF	3855	1698	8	6
RV32ICMF	4095	1737	8	6

Throughput

Configuration	LUT	FF	BRAM	DSP
RV32I	1200	547	8	0
RV32IC	1247	587	8	0
RV32IM	1577	684	8	4
RV32IMF	4044	1814	8	6
RV32ICMF	4243	1854	8	6

Performance

Configuration	LUT	FF	BRAM	DSP
RV32I	1235	631	8	0
RV32IC	1208	671	8	0
RV32IM	1304	768	8	4
RV32IMF	4012	1906	8	6
RV32ICMF	4229	1946	8	6

Frequency

Configuration	LUT	FF	BRAM	DSP
RV32I	1762	1252	8	0
RV32IC	1713	1315	8	0
RV32IM	1956	1448	8	4
RV32IMF	4685	2780	8	6
RV32ICMF	4949	2846	8	6

From the tables and charts, we can see:

1. The smallest RV32I has the least resource usage

It does not include compression, multiplication, floating-point, and other extensions

It is very suitable for replacing medium and small FSMs

1. The M extension leads to a moderate increase in resources

LUT/FF has a certain increase

DSP consumption increases (multipliers)

1. The F extension leads to a significant increase in resources

Because the FPU (floating-point unit) requires a large amount of logic

1. The C extension is almost “free”

The hardware increase is minimal

But it significantly reduces code size and BRAM usage

Strongly recommended to enable

1. ICMF (fully functional) has the most resources

But compared to other CPUs, achieving the same functionality is still quite cost-effective

Resource Growth Trends (Relative to RV32I)

Variant	ΔLUT	ΔFF
RV32IM	+37%	+29%
RV32IMF	+368%	+278%
RV32IC	+26%	+9%
RV32ICMF	+398%	+287%

It can be seen that:

The C extension is the most cost-effective, and it is recommended to enable it in almost all projects

The F extension is the main source of resource explosion

The M extension is very worthwhile to enable, requiring only a small amount of DSP

Best Configuration Recommendations for Different Applications

Based on resources, performance, and empirical data, the following recommended options for common designs can be provided:

● RV32IM (Throughput)

Excellent balance — about 1.5K LUTs, 4 DSPs

Suitable for tasks that require a small amount of arithmetic and reliable throughput

● RV32IMF (Performance)

Compute-intensive — 4012 lookup tables, 6 digital signal processors

High performance and high computational power requirements

Example: floating-point operations, control algorithms

● RV32IC

If the workload only involves integer operations and memory bandwidth is limited, it is the most cost-effective choice.

Designs sensitive to BRAM should prioritize this option

● RV32ICMF (Area)

Suitable for complex system control

Instruction compression improves program density

Conclusion: MicroBlaze V is a More Modern and Flexible Alternative to FSM

In FPGA design, using MicroBlaze V instead of complex FSM can:

• Significantly reduce RTL complexity

• Improve maintainability

• Accelerate debugging efficiency

• Achieve extremely high flexibility and scalability while keeping resource usage under control

In the minimal configuration, MicroBlaze V has very low resource usage but can easily implement many complex functions that are difficult to maintain with FSM.

For control tasks that require rapid adaptation to changes, high software scalability, and complex logic, MicroBlaze V is undoubtedly a more advanced and efficient choice.