Understanding MPIDR_EL1 Register Affinity in ARMv8/ARMv9

The official documentation (<span>ARM ARM</span>) introduction is as follows:

Understanding MPIDR_EL1 Register Affinity in ARMv8/ARMv9

Translating the English related to <span>MPIDR_EL1</span>, it is as follows:

Function: Provides an additional PE (process element) identification mechanism for scheduling in multi-processor systems. Attributes: MPIDR_EL1 is a 64-bit register. Field values: [63:40]: Reserved, RES0. [39:32]: Affinity level 3. For more information, refer to the description of Aff0. [31]: Reserved, RES1. [30]: U. Indicates a single-processor system, different from pe0 in multi-processor systems. Possible values for this bit are: 0b0: The processor is part of a multi-processor system. 0b1: The processor is part of a single-processor system. [29:25]: Reserved, RES0. [24]: MT. Indicates whether the associated lowest level consists of logical PEs implemented using multi-threading types. Possible values for this bit: 0b0 when the performance affinity level of PEs is the lowest, or when PEs using MPIDR_EL1.MT are set to 1, the different values at level 0 or the same value at level 1 or higher are independent. 0b1 when the performance affinity level of PEs is the lowest, or when PEs using MPIDR_EL1.MT are set to 1, the different values at level 0 or the same value at level 1 or higher are highly correlated. [23:16] Affinity level 2. [15:8] Affinity level 1. [7:0] Affinity level 0. This Affinity level is most important for determining PE behavior. The higher the level of affinity, the lower its importance. The set of fields assigned to the value of MPIDR {Aff2, Aff1, Aff0} must be unique across the system. Accessing MPIDR_EL1: MRS, MPIDR_EL1

Summary: After reading, it is still not entirely clear. In fact, it can be summarized in two points: the smaller the values of aff0/aff1/aff2/aff3, the more important they are, and the combination of {Aff3, Aff2, Aff1, Aff0} must be unique.

We continue to refer to the Core TRM manual (taking the A78 TRM as an example), and finally find the answer.

Understanding MPIDR_EL1 Register Affinity in ARMv8/ARMv9

To summarize: 1. aff0: indicates which thread in a core, most cores are single-threaded, so the value is mostly 0. 2. aff1: indicates which CPU in a cluster. 3. aff2/aff3: indicates which cluster in the system, this value is determined by the input signals to the core provided by the SOC manufacturer.

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