Background: Why There Is a Switch in Execution States
In a large system, when we refer to it as 64-bit or 32-bit, we often mean the kernel. In fact, within such a large system, there are multiple layers of images, and not all of them are 64-bit or 32-bit. The following diagram illustrates a commonly used execution state in a certain SoC system.
Interprocessing: Switching Execution States
The interaction between AArch64 and AArch32 execution states is called interprocessing.
There are two execution states in ARMV8/ARMV9 (Execution state): aarch64 and aarch32, and there are only two ways to switch between them:
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(1) reset
- (2) changing Exception level
The switching rules are:
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Switching from aarch32 to aarch64 must trigger an exception, resulting in a switch from low exception level to high exception level.
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Switching from aarch64 to aarch32 must be an exception return, resulting in a switch from high exception level to low exception level.
- When the exception level remains unchanged, generated exceptions and exception returns cannot change the execution state.
In summary, it can be concluded as follows:
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If the high exception level is aarch64, then the low exception level can be either aarch64 or aarch32.
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If the high exception level is aarch32, then the low exception level can only be aarch32.
Introduction to Registers
SCR_EL3
If EL3 is implemented, then after PE reset, it will directly be aarch64. SCR_EL3.RW will determine the execution state of the lower exception level.
HCR_EL2
If EL2 is implemented and the execution state of EL2 is aarch64, HCR_EL2.RW will determine the execution state of EL1.
PSTATE and SPSR_ELx
If EL1 is aarch64, then SPSR_EL1.M[4] will determine the execution state of EL0.
Code Overview
