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The annual event in the chip industry has just concluded! From November 24 to 25, the Zhuhai + Macau dual-city linkage, the 2025 RISC-V Industry Development Conference and the RDSA International Forum grandly opened with the theme of “Building Standards Together, Ecological Interconnection”. Nearly a thousand top scientists, academicians, and industry representatives from around the world gathered to engage in deep discussions on RISC-V’s technological breakthroughs, ecological co-construction, and scene implementation.
Whether you are a practitioner deeply involved in the chip field or an observer interested in technology trends, the signals released by this conference are worth savoring. Today, we will explore RISC-V’s current status and future from the perspectives of “What is it, what are its advantages, and why is it important?” to the core achievements of the conference and industry opportunities!1. Basic Understanding: What Exactly is RISC-V?In simple terms, RISC-V (Reduced Instruction Set Computer Architecture, Fifth Generation) is the “basic command language” of chips, comparable to the well-known X86 and ARM architectures, defining the interaction rules between software and hardware— all operating systems and applications must communicate with hardware through it, and its design directly determines the chip’s performance, power consumption, and scalability.Unlike the latter two, this architecture proposed by the University of California, Berkeley in 2010 was born with an “open-source” gene, which also laid the groundwork for its subsequent explosion.2. Core Advantages: Why Can RISC-V Stand Out?In a market long dominated by X86 and ARM, RISC-V’s rapid rise is attributed to three major differentiated advantages:1. Open-source and free, breaking down licensing barriers: X86 is completely closed-source and has high licensing fees, while ARM’s core technology is controlled by enterprises. In contrast, RISC-V’s core instruction set is completely open-source, allowing enterprises and developers to access standard documents for free, enabling chip design without any licensing fees, significantly lowering the entry barrier.2. Simplified and flexible, adaptable to diverse scenarios: X86 instructions are complex and redundant, poorly suited for low-power scenarios; ARM, while simplified, has a complicated core series, limiting scalability. RISC-V adopts the concept of “minimal core + modular expansion”, with only about 40 basic instructions, while providing rich extension modules such as integer, floating-point, and encryption, allowing enterprises to combine as needed, balancing low power consumption and high performance requirements.3. Decentralized, accelerating ecological iteration: The X86 and ARM ecosystems are dominated by a few enterprises, making it difficult for small and medium participants to engage in core standards. RISC-V attracts global enterprises, universities, and developers to co-build the ecosystem, from standard revisions to toolchain improvements to product development, forming a collaborative network that significantly enhances iteration efficiency.3. Strategic Value: Why is RISC-V Taken Seriously Worldwide?The rise of RISC-V is no coincidence, but a joint choice of technological iteration, strategic security, and industrial development:Technologically: The Moore’s Law is gradually losing effectiveness, and traditional architectures are facing performance and power consumption bottlenecks, while the demand for customized computing power in scenarios like AI and low-altitude economy is surging, and RISC-V’s customizability precisely breaks the deadlock.Strategically: In the global industrial chain landscape, the licensing barriers and control of X86 and ARM restrict independent development, and RISC-V’s open-source nature has become a key path to breaking the “bottleneck” in chip development, becoming a focus for various countries.Industrially: The early issues of non-unified standards and imperfect ecosystems are gradually being resolved. The standard working group and evaluation system launched at this conference, along with international cooperation and the collaboration of five major innovation hubs in China, are making the ecosystem increasingly mature, with benchmark products like the Damo Academy’s XuanTie further confirming its maturity.Market-wise: The explosion of trillion-level tracks such as AI and low-altitude economy, the “RISC-V + DSA + chiplet” solution can adapt to the 20-fold growth demand for AI computing power, improving efficiency by 10-1000 times, and its customizability also meets the requirements for the autonomy of low-altitude economy flight control chips, forming a virtuous cycle of “technology adapting to scenarios, and scenarios feeding back to industry”.4. Brief Review of Conference ParticipantsThis conference was jointly organized and co-hosted by multiple entities, including industry associations, industrial alliances, and research institutions: The China Electronics Standardization Institute RISC-V Working Committee (the core association promoting the formulation of domestic RISC-V standards and industry collaboration), the RDSA Industrial Alliance (an industrial collaborative platform focusing on the integration of RISC-V and DSA), the Guangdong-Hong Kong-Macao Greater Bay Area RISC-V Open Source Ecological Development Center (the core carrier for regional ecological construction created through Zhuhai-Macau linkage), and the Macau Institute of Industrial Technology (an important research force promoting industrial technological innovation in Macau); the hosting entities include Zhuhai Technology Industry Group (the core entity for local technology industry investment and operation in Zhuhai), LeapFrog Technology (a core technology enterprise in the RISC-V field), and the Hengqin Guangdong-Macao Deep Cooperation Zone Open Source Semiconductor Research Institute (a professional institution focusing on open-source semiconductor technology research and development). This industry event gathered nearly a thousand core players from multiple countries and regions around the world—including top scientists, academicians, and representatives from various segments of the industrial chain—to engage in deep discussions on core topics such as RISC-V technological breakthroughs, standard co-construction, ecological collaboration, and scene implementation, injecting strong new momentum into the open-source chip industry.5. Core of the Conference: Overview of Key TopicsStandards and Compliance Subforum: The “RISC-V Standard System Construction White Paper (2025 Edition)” was released, clarifying the standard roadmap for six major areas, with companies like Huawei and ZTE signing the “Standard Implementation Commitment” to promote the transition from “formulation” to “execution” of standards.AI and High-Performance Computing Subforum: Damo Academy released an upgraded version of the XuanTie 910B processor IP core, with a 50% increase in computing density; Tsinghua University shared an edge-side small model inference solution, achieving a 30% better energy efficiency ratio than traditional architectures, already piloted in smart monitoring.Embedded and IoT Subforum: OpenHarmony and the RISC-V Alliance released the adaptation kit V2.0, covering 12 types of scenarios, with Midea and Gree showcasing prototypes of smart air conditioners and industrial controllers, set for large-scale production in 2026.Low-altitude Economy and Vehicle Electronics Subforum: The “Autonomous Solution for Low-altitude Flight Control Chips” was released, with contracts signed with COMAC and EHang; Zhongqi Chuangzhi and Saifang Technology collaborated to develop smart cockpit MCU chips, set to be equipped in vehicles by 2027.6. Achievements Realized: 20.3 Billion Yuan in Contracts, These Projects are the Most SignificantThe concentrated signing session at the closing ceremony of the conference was a highlight, with over 40 cooperation agreements totaling an investment of 20.3 billion yuan, covering three categories of landmark projects:Ecological Carrier Construction: An investment of 5 billion yuan to build the “RISC-V Open Source Chip Innovation Park”, planning design service platforms, compatibility testing centers, etc., which will gather 200 upstream and downstream enterprises after being put into use in 2027.Core Technology R&D: LeapFrog Technology and Sun Yat-sen University invested 3.5 billion yuan to tackle 3nm high-performance processors, expected to be commercialized in 2028; Guoxin Technology and China Electronics Technology Group invested 2.8 billion yuan to develop financial security encryption chips, filling domestic gaps.Scene Application Realization: Zhuhai invested 4 billion yuan to build a “Smart Transportation Application Project”, aiming for city-wide coverage by 2026; Xiong’an invested 5 billion yuan to build a sensor production line to support digital city construction.7. Industry Outlook: Opportunities and Risks Coexist, How to Move Forward?The signals released by the conference outline a clear blueprint for RISC-V in the next 5-10 years, with both opportunities and risks being prominent:Three Major Opportunities1. Accelerating Penetration Rate: The RISC-V International Association predicts that by 2031, the global penetration rate will rise from 2.5% to 33.7%, with China expected to exceed 40%; by 2027, the penetration rate in embedded IoT scenarios will exceed 50%, and by 2028, the AI edge market share will surpass ARM.2. Ecological Collaboration as the Core of Competition: In the next 3-5 years, three major clusters will form: “Guangdong-Hong Kong-Macao Greater Bay Area (R&D + Manufacturing), Yangtze River Delta (Scenarios + Applications), Beijing-Tianjin-Hebei (Policies + R&D)”, deepening cooperation with Brazil and Southeast Asia, with China expected to exceed 35% in global ecological discourse power.3. Dual-Driven by Policy and Capital: The state will establish special R&D funds, combined with the 20.3 billion yuan signed capital, aiming for commercial use of 3nm high-end processors by 2028 and achieving independent replacement of high-end chips in key areas before 2030.Four Major Risks1. Risk of Standard Fragmentation: More than 12 customized extension instruction sets have emerged globally, and if a compatibility assessment system is lacking, collaboration and adaptation costs may increase before 2026.2. Talent Gap in Technology: Core technologies such as high-end instruction set optimization and toolchain efficiency lag behind X86/ARM, with fewer than 5,000 domestic R&D personnel with over 10 years of experience, potentially leading to “low-end surplus and high-end dependence”.3. International Competitive Barriers: ARM and Intel have laid out thousands of peripheral patents, and Europe and the United States may promote “open-source export controls”, making overseas expansion susceptible to patent litigation.4. Commercialization Profitability Challenges: 80% of shipments are concentrated in low-end scenarios with prices below $1, with an average R&D return rate of only 12%, below the industry average, posing financial chain risks for small and medium enterprises.8. On-Site Perspective: RISC-V Ecosystem from the Eyes of Macau StudentsWu Hanqin, a master’s student in big data and IoT at the Macau University of Science and Technology, shared unique observations as a participant: “Zhuhai and Macau attach great importance to this conference, and RISC-V indeed brings opportunities for the development of both places, but the communication circle in Macau also has certain limitations—there is a shortage of open-source evangelists, and the atmosphere for open-source in universities is insufficient. Although some students participate in open-source projects, the scale is relatively small. In contrast, Shandong University and Sun Yat-sen University have established mature talent training systems with the support of foundations and communities.” This also reflects that the construction of the RISC-V ecosystem still needs to address the regional shortfall in talent cultivation.
On the right isWu Hanqin, a master’s student in big data and IoT at the Macau University of Science and TechnologyFrom technological breakthroughs to ecological co-construction, from strategic layout to scene implementation, the 2025 RISC-V Industry Conference has shown us the infinite possibilities of open-source chips. For the industry, seizing the window period of rising penetration rates and solving the challenges of standards and talent will be key to achieving a leapfrog development. What are your views on the development of RISC-V? Feel free to share in the comments!
Scan the QR code to follow Fan Fan’s TalkWith over 10 years of media and brand communication experience, focusing on IT technology and open-source ecology, mutual assistance, and growth.
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