For embodied intelligence to achieve large-scale application, leading chip companies like Intel must break through the limitations of computing architecture.
When Russia’s first AI humanoid robot “Aidor” staggered onto the stage accompanied by the theme song from the movie “Rocky,” everyone thought a highlight moment was about to arrive.
Unexpectedly, “handsome for only three seconds” —
After waving to the audience, it quickly lost its balance, fell, and convulsed, being hurriedly dragged away by staff.
Recently, this is not the only robot that has faced difficulties.
In September, Tesla’s Optimus was criticized for its slow response; the “stunning demonstration” of the 1X pre-sale version was dismissed by public opinion as being remotely controlled.
Industry insiders are not surprised by this. Many demonstrations heavily rely on manual control, and numerous robots struggle to even “stand still and complete operations”; in factories, “plugging in a dongle or applying a film” is comparable to “landing on the moon.”
Intel has also discovered through discussions with dozens of embodied intelligence teams that there is a significant gap between robots that “can run and jump” and those that “can work on production lines.”
What exactly is preventing them from stepping into the production front line?
Trapped in the computing power platform, embodied intelligence
On November 19, at the Intel Technology Innovation and Industry Ecosystem Conference in Chongqing, the issues of training data, applications, and the architecture of “brain/small brain separation” were brought to the table. However, one answer was repeatedly mentioned: the computing power platform is becoming one of the biggest barriers to the implementation of embodied intelligence.
Currently, the humanoid robots that are mass-produced and relatively mature mostly adopt the “brain + small brain” architecture, known as “slow system + fast system” —
The “brain” is responsible for deep thinking, handling tasks such as LLM, VLM, CNN, CLIP, SAM, and other modeling and understanding of the world;
The “small brain” is responsible for “making the body move,” extremely sensitive to response speed, including 3D positioning and navigation, robotic arm control, gait control, etc., with control frequencies often reaching 500Hz to 1000Hz.
In the past, robots mainly relied on traditional motion control, but now the demand for computing power has grown geometrically due to the layering of motion generation models, multimodal perception, and large model inference.
A guest at the event mentioned, “Many chips from other industry manufacturers we use achieve sparse computing power of 100 to 200 TOPS, but it is still not enough.” And this is just the tip of the iceberg when it comes to industrial scenarios.
With the surge in computing power, many companies are resorting to “patching together” and setting up “two systems.” For example, Intel Core (12th/13th generation mobile processors) runs the “brain,” while NVIDIA Jetson Orin runs the “small brain,” and the “two systems” must also communicate across chips and coordinate across systems.
The results are predictable. Think of “Aidor,” which was “handsome for only three seconds”; if there is a delay in visual command transmission, the robot will fall. Currently, the precision and efficiency issues troubling humanoid robots, as well as the performance bottlenecks of edge controllers, can be partly attributed to this.
The computing power platform is not only a technical issue but also an economic issue for implementation. For humanoid robots that are truly entering small-scale production, ROI is certainly the first metric we consider.
Manufacturing has the strictest assessments of ROI. In hard metrics, robots not only need to be able to work, but “stability, safety, cost, and power consumption” are all calculations that managers must clarify.
In soft metrics, to avoid technology investments becoming “one-time dead assets,” companies hope that they can be quickly deployed and flexibly scaled up or down with changes in factories and production lines.
Clearly, the hardware stacking of “two systems” cannot meet these stringent requirements (development costs, heat dissipation solutions, power consumption, price, deployment, scalability, etc.).
Guests at the event believe that robots need to simultaneously utilize CPU, GPU, and NPU heterogeneous computing power. How to efficiently integrate these heterogeneous computing powers into a small, low-power chip, while ensuring high collaboration and easy access for developers, is a significant challenge.
Moreover, as embodied intelligence accelerates its evolution, the integration, expansion, and utilization efficiency of computing power are becoming key bottlenecks limiting industry implementation.
“Antidote”:
Achieving the “fusion” of the brain and small brain with a “single system”
Tasks that previously required “two systems” to complete the “brain + small brain” can now be accomplished within a single “system.” This is precisely the “brain-small brain fusion” solution proposed by Intel —
Using a single SoC, it unifies intelligent cognition and real-time control into the same architecture.
This SoC is the Core Ultra processor. It integrates CPU, Intel Iris™ GPU, and NPU within a single package, allowing the three to work together, achieving AI inference capabilities, high-performance CPU computing, and industrial-grade real-time control, all in one hand.
Isn’t it very similar to the nine-square grid of Chongqing hotpot? Each IP (CPU/GPU/NPU/I/O) is like a dish in the grid, allowing for both “set meals” and free combinations based on demand, depending on the “taste” requirements of the robot manufacturers.
As a result, what originally required cloud-based large model inference can now run directly on the edge, responding faster, ensuring higher privacy, and being more economical.
The Core Ultra achieves approximately 100 TOPS of AI computing power while maintaining similar power consumption. Intel’s Vice President and General Manager of Intel’s Edge Computing Division, Dan Rodriguez, mentioned this during the conference keynote. Users do not need to reconstruct their systems; they only need to upgrade the CPU to enable existing products with AI capabilities.
Let’s first look at the built-in GPU.
It has 77 TOPS of AI computing power, specifically designed to handle the heaviest visual and large model tasks. This performance is sufficient to support the operation of 7B to 13B level VLMs, easily managing tasks such as object recognition, path planning, and sorting.
If developers need stronger AI capabilities (larger LVM, VLA, etc.), they can expand using Intel Arc discrete graphics.
When computing power demands reach the thousand TOPS level, such as controlling full-body movements and executing multimodal long-chain reasoning, Intel believes that further integration with external “cloud brains” or edge brains is necessary for collaborative inference.
This on-demand expandable heterogeneous computing power system becomes the key foundation for embodied intelligence to smoothly transition to complex tasks.
NPUis responsible for light-load permanent tasks, such as continuously listening for voice wake-up, dynamic object detection, and other long-term online AI functions, ensuring a low-power, zero-latency experience.
CPU is further amplified in value.
Thanks to Intel’s years of accumulation in traditional robotic motion control and deep optimization of underlying instructions and architecture, the CPU runs traditional visual algorithms and motion planning faster and more stably than before.
For example, real-time jitter is less than 20 microseconds, meaning that the robot’s balance control, complex force control, and hand-eye coordination, which are sensitive to latency, can now run on the CPU.
Moreover, the CPU has incorporated dedicated AI acceleration instructions, allowing it to share some of the AI inference and trajectory planning tasks originally executed by the GPU in scenarios like visual servoing. This makes computing power scheduling more flexible, energy-efficient, and better aligned with the stringent requirements of robots for power consumption and real-time performance.
Dan Rodriguez also mentioned that the Panther Lake (18A process) to be released in January next year will further enhance performance. Graphics performance will increase by up to 50%, while power consumption will decrease by 40% at the same performance level, and AI acceleration will increase to 180 TOPS, supporting extended temperature ranges and industrial-grade real-time performance, which means the application boundaries of embodied intelligence will be further expanded.
Software Stack: Three-Pronged Approach to Accelerate Implementation
In addition to computing power, Intel has also equipped the software stack.
From “what robots see, how they learn, and how they move” to system-level scheduling, drivers, and real-time control, Intel provides a full-stack suite, allowing developers not to start from “zero frames.”
For hardware manufacturers such as OXMs, ODMs, and OEMs, Intel has prepared a complete machine-level solution, AI Edge Systems. The operating system, drivers, SDK, real-time optimization, BSP, and EtherCAT drivers are all packaged together.
For example, a BSP that has already been preemptively RT, manufacturers do not need to modify the kernel for real-time performance; they can simply flash the system, and the robot will immediately have an “industrial-grade heartbeat.”
System software vendors are in the middle layer, needing to squeeze every bit of computing power from the chip to provide the best operating environment for upper-layer applications. Intel has prepared the Open Edge Software Toolkit for them, which not only includes AI libraries and tools but also contains a large number of OSV-level optimizations to ensure stable performance across different platforms.
Here are a few key levers Intel is using to build its AI ecosystem.
One is oneAPI, a “computing power highway” that connects CPU/GPU/NPU. Developers write code once, and the system automatically decides which unit to run on, whether it’s CPU, GPU, NPU, or even FPGA, with full automatic scheduling and optimization.
This allows existing facilities (old machines) and incremental facilities (new AI hardware) to work together under the same code logic, breaking down computing power “islands.” Need to expand computing power? Just connect Intel Arc.
There is also the “golden combination” of OpenVINO + IPEX-LLM.
OpenVINO is responsible for AI inference acceleration, automatically compressing, quantizing, and slimming models such as TensorFlow and PyTorch, converting them into the format most suitable for execution on Intel hardware, automatically deciding where inference will occur and balancing the load.
IPEX-LLM allows large models to run faster locally.
The combination of the two can adapt to edge devices of different eras and specifications, addressing the real challenges of complex environments in industrial sites.
For top-level industry solution developers (ISV/SI), Intel provides ready-made industry templates, AI Suites. Common skills such as grabbing and navigation are available with one click; if larger models are needed, they can directly connect LLM, VLM, VLA, and also come with reference demos that can be slightly modified for implementation, significantly shortening the cycle from “bare metal” to “working robot.”
Breaking the Ice and Moving Forward, Openness Leads to the Future
Unlike the closed approach of “full package, all-in-one,” Intel’s “brain-small brain fusion” chooses a more open and flexible technical path:
The same code can run on CPU/GPU/NPU/FPGA and can freely switch between Intel and Arm platforms;
All mainstream AI frameworks and models are fully compatible, with no library or model lock-in;
ROS2 and various open-source algorithm libraries are also fully supported.
From underlying computing power and networks to software stacks, model frameworks, and application frameworks, enterprises can freely combine as needed. This means they do not have to overturn existing systems or be locked in by any supplier, but can continue to evolve along the existing industry ecosystem, turning data and large models into real productivity.
In recent months, Intel has deeply collaborated with dozens of embodied intelligence manufacturers in China, with more than ten entering the verification or POC stage. In a field filled with uncertainties in both technology and market, this open and free system is becoming a route that more and more robot companies are willing to try.
For more details, please refer to Intel’s white paper on embodied intelligence. 
White Paper on Innovative Applications of Smart Factories Based on Embodied Intelligence
Intel’s Brain-Small Brain Fusion Solution for Embodied Intelligence
