In the wave of “AI sinking and everything becoming intelligent,” low-power, small-sized, and quickly deployable programmable logic devices are becoming the key computational support for edge devices. At the same time, the demand for hardware security, reliability, and boot speed in industries such as industrial, communication, automotive electronics, and servers is rapidly increasing.
In this context, FPGAs (Field Programmable Gate Arrays) are quietly experiencing a “second rise”—especially lightweight FPGAs that are “small yet powerful” are becoming the new favorites for edge AI and embedded intelligence.
Recently, Lattice Semiconductor launched two new products—Certus-NX and MachXO5-NX, which have once again refreshed industry perceptions in terms of I/O connectivity, security, power consumption control, and size adaptation, providing highly competitive hardware support for key application scenarios in AI, industrial, communication, servers, and automotive electronics.
Image Source: Lattice
In the era of edge intelligence, lightweight FPGAs are being “reinvented”.
In traditional FPGA application fields, communication, broadcasting, military, and aerospace are the main battlegrounds. However, entering the 2020s, FPGAs are gradually evolving from “custom hardware” tools to the infrastructure supporting “flexible intelligent edges”.
Several important industry trends are driving a surge in demand for lightweight FPGAs:
AI sinking to edge terminalsFrom smart cameras and access control systems to industrial visual inspection and in-vehicle AI central control, edge devices are no longer just data collectors; they need to achieve local intelligent inference and secure control.
Extreme sensitivity to power consumption and boot speedTraditional MCUs struggle with parallel logic control tasks, while high-power high-end FPGAs are “overkill.” Low-power, fast-booting FPGAs perfectly fill this “golden middle ground.”
Hardware security and reliability have become essential optionsWith the increase in hardware attacks and the complexity of network devices, how to achieve trusted boot and hardware encryption from power-on to system operation has become a focal point in the design of various embedded products.
Therefore, not all FPGAs are suitable for the future era of edge intelligence. The more “lightweight,” “flexible,” and “secure” the FPGA, the more likely it is to become mainstream.
What are the killer features of Certus-NX and MachXO5-NX?
Lattice’s newly released Certus-NX and MachXO5-NX are both built on the self-developed Nexus platform and leading 28nm FD-SOI process, striving for “small, fast, economical, and stable”.
✅ Higher I/O density, creating a flexible connection hub
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Supports 3.3V high-voltage general-purpose I/O, doubling the number of I/Os per unit package area
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Equipped with 1.5 Gbps differential I/O, data transmission speed increased by 70%, paving the way for high-speed industrial or AI edge nodes
✅ Stronger system integration and low power performance
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Compared to similar competing products, power consumption is reduced by up to 4 times
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Integrated Flash storage, supporting more secure configurations
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Boot time accelerated by 12 times, meeting the high boot time requirements of applications such as automotive systems and secure server boot
✅ More reliable and secure, safeguarding critical devices
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Soft error rate reduced by 100 times, addressing high stability scenarios in aerospace, industrial, and power sectors
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Built-in SEC logic and memory ECC mechanisms to protect against system crash risks caused by single-event upsets (SEU)
The two products serve different purposes: Certus-NX is more general-purpose, while MachXO5-NX is more secure.
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Certus-NX FPGA: Positioned as a general-purpose high-performance I/O FPGA, suitable for high-speed communication, industrial interconnect, and edge AI visual computing.
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MachXO5-NX FPGA: Continues the MachXO series’ advantages in system control and secure boot, integrating richer configuration security mechanisms, designed specifically for server management, secure boot, and power management scenarios.
Their common advantages: small package, low power consumption, high security, fast boot, and flexible I/O, perfectly addressing the five major pain points in current edge device design.
How does Lattice transition from “small and beautiful” to “big and strong”?
Unlike traditional FPGA giants that focus on high-end large-scale logic unit competition, Lattice has taken a differentiated route of “edge intelligence first”:
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Relying on the Nexus platform, Lattice deeply binds product architecture to core keywords such as low power consumption, fast I/O, and system security
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Utilizing Radiant development software and a complete IP ecosystem to lower the threshold for embedded customers to use FPGAs
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Continuously focusing on markets such as AI, industrial, communication, automotive, and servers that “have computational needs but prioritize efficiency”
In the global FPGA landscape, this is a unique “mid-field breakthrough” strategy, not relying on stacking transistors, but on precise positioning to tap into the trillion-dollar intelligent terminal market.
We are quietly entering the golden age of low-power FPGAs.
AI is not just about large models and cloud computing; what truly impacts our lives is the “micro-intelligence” embedded in every terminal. From smart locks and electric vehicle controllers to AI speakers and industrial arm control modules, an increasing number of “micro-brains” require secure, efficient, and flexible hardware foundations.
Lattice’s new generation of FPGAs is precisely the brain core tailored for these devices.
They may not be eye-catching, but they are ubiquitous; they are small in size but powerful; they will become key pieces in the future trillion-level intelligent edge.
