On July 17, 2025, the 2025 RISC-V China Summit officially opened in Zhangjiang, Shanghai, China. Frans Sijstermanns, Vice President of NVIDIA, delivered a keynote speech titled “Deploying RISC-V Application Processors on NVIDIA Computing Platforms,” introducing NVIDIA’s development history and achievements in RISC-V CPUs, and announced that its key CUDA software will also support full deployment on RISC-V.
As early as October 2024, NVIDIA revealed at the RISC-V North America Summit that it had chosen RISC-V as the successor architecture for its proprietary Falcon microcontroller (MCU) back in 2015. Since the MCU core is general-purpose, it can be widely used in NVIDIA’s products. According to NVIDIA’s estimates at that time, it would deliver 1 billion RISC-V processors embedded in its GPUs, CPUs, SoCs, and other products in 2024, highlighting the universality and importance of custom RISC-V cores in NVIDIA hardware.
At this RISC-V China Summit, Frans Sijstermanns also pointed out that NVIDIA is a board member and technical committee representative of RVI and RISE, and a contributor to relevant specifications. The microcontrollers in NVIDIA products are based on the RISC-V architecture, featuring configurable, scalable, and secure protection capabilities, and are integrated into over 30 IPs, with annual shipments exceeding 1 billion RISC-V MCUs.
Although NVIDIA has integrated RISC-V CPU cores into its hardware as microcontrollers, its CUDA software, which drives GPUs for efficient AI acceleration (an extension based on C and C++), is currently only deployed on x86 and Arm architecture CPUs.
To support the development of RISC-V in high-performance computing/AI computing fields, Frans Sijstermanns officially announced at this RISC-V China Summit that CUDA will support the RISC-V architecture, stating, “We are currently working on this porting, and I believe this future holds great potential.”
According to reports, CUDA mainly consists of two key components: a Toolkit and a driver. The CUDA Toolkit functions like a compiler, possessing excellent compilation capabilities and includes many components.
For example, a complete CUDA-accelerated application example includes specific application modules, third-party software, and CUDA library code, all of which need to be mapped to the target CPU. In the chart below, PyTorch is used as an example, along with CUDA KMD and CUDA UMD. NVIDIA is working on the porting of the green section in the diagram below. Additionally, third-party software or application software also needs to be ported to RISC-V.
Furthermore, CUDA libraries are also very important, as each vertical industry may require its own library. For instance, NVIDIA’s FT library can accelerate inference, along with related data analysis libraries and libraries that accelerate chip manufacturing.
“We have been deeply involved in this industry for 20 years, establishing over 900 different libraries, and accelerating the technological development of various industries is our goal. After porting to RISC-V, we will be able to implement all of these libraries, allowing everyone to innovate more quickly in design and technology iterations,” explained Frans Sijstermanns.
Frans Sijstermanns pointed out that RISC-V has made significant progress in recent years. Since 2022, at least 10 new specifications have been approved by the RISC-V International Foundation, with RVA23 being a very important specification, and the server SoC specification has also been approved. Additionally, on the software side, RISC-V has also made substantial progress, with 75 different software packages now “running” on RISC-V listed on the RISC-V International Foundation’s official website. For example, operating system programs like Linux and even some toolchains have been released, along with databases and network virtual machines. “There are also some very important foundational works, such as compilers, simulations, and toolchains. Only when these works are in place can we further develop. For this, I would like to thank the entire RISC-V Foundation and ecosystem partners,” he added.
What challenges will arise in porting CUDA to RISC-V?
Frans Sijstermanns stated that the key issue lies in the availability of RISC-V CPU boards, as CUDA porting requires not only a CPU but also a corresponding GPU. For instance, NVIDIA is using Alibaba’s Damo Academy’s RISC-V CPU C920, which is excellent for NVIDIA at the development level, but currently, there is no SoC that supports the approved RVA23 specification, as NVIDIA needs unified virtual memory to further share data between CPU and GPU memory, and even copy and paste data between the two while ensuring consistency to guarantee user experience.
“We are currently working closely with partners in the entire ecosystem to further improve CUDA. At the same time, we hope to release a standard version of CUDA that is also compatible with RISC-V, so that we can better meet the server platform specifications and the RISC-V standards of the Linux operating system,” emphasized Frans Sijstermanns. “We hope to resolve all these issues in the entire system before releasing it.”
In addition to CPUs and GPUs, NVLink is also a key component of NVIDIA, which integrates related software. Together with CPUs and GPUs, these can be seen as a complete system-level NVLink Fusion architecture design, enabling the entire data center to work better and faster.
Frans Sijstermanns hinted that under the NVLink Fusion framework, RISC-V will be part of the control path in the future, playing an important role in the entire system, and may even become a custom accelerator or custom CPU integrated with NVLink in NVIDIA’s rack architecture.
“NVIDIA’s entire business is accelerating computing; we actually do not care what specific CPU it is,” stated Frans Sijstermanns. “Whether it is x86, Arm, or RISC-V, we hope to be compatible. Therefore, the key is to allow users and developers to have their own choices.”
“CUDA can effectively help us leverage NVIDIA’s communication processors to accelerate RISC-V server processors and better propose a complete set of hardware solutions, which is our vision of transitioning from CUDA software to hardware. Of course, there is a lot of work to be done in this area. Meanwhile, we also need to see good RISC-V CPUs in the entire ecosystem and among our partners to enable them to play their relevant roles,” concluded Frans Sijstermanns.
Editor: Chip Intelligence – Lang Ke Jian
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