RISC-V is an open standard instruction set architecture (ISA) conceived by developers at the University of California, Berkeley in 2010 and is continuously evolving.
RISC in RISC-V stands for Reduced Instruction Set Computer, which means it is designed to simplify each individual instruction given to the computer.
Since RISC-V is an open standard, anyone can implement, customize, and extend the ISA to meet their requirements. However, RISC-V is not the first open ISA: some older RISC ISAs, including POWER and SPARC, have already been released as open source into the public domain. For example, the OpenRISC project has proven popular in academic and hobbyist circles. However, previous open-source architectures have not garnered industry traction like RISC-V.
What Makes RISC-V Remarkable?
In a word: freedom. Whether you are a seed startup, a home hobbyist, or an industry heavyweight, RISC-V offers a way to design and build chips for your devices that are customized to include everything you need, without anything you don’t.
RISC-V is also a borderless ISA. Given the unprecedented geopolitical and supply chain impacts that hinder free trade in today’s semiconductor technology, companies from the U.S. and Europe to China and Russia are turning to and even collaborating to strengthen RISC-V as a global open standard. Another key driver of RISC-V’s success is its flexibility. As Moore’s Law slows and the costs and complexities of chip design soar, chip designers are shifting from scaling process nodes to adopting specialized computing to meet new computational demands.
Unlike commercial ISAs that do not allow free modification, RISC-V also allows users to implement custom instructions and extensions, enabling highly specialized chips optimized for unique and specific workloads. Extensions include atomic operations and support for AI- and HPC-centric processing such as floating-point math (bfloat), matrix multiplication, vector extensions, and quantization.
Initial negative feedback about RISC-V mainly revolved around the reckless customization and the danger of fragmentation it could lead to. A key advantage of more tightly controlled commercial ISAs is the ability to port code between different processor IPs with minimal adaptation. Without controls, you might end up with thousands of different customized ‘fragmented’ versions of processor IPs, each of which can only successfully run software specifically written to be compatible with it.
RISC-V International coordinates the development of the RISC-V instruction set architecture (ISA) and is taking steps to mitigate fragmentation, allowing anyone to build custom extensions for public release so that they can receive RISC-V’s approval and standardization.
What Can RISC-V Chips Do?
The industry has quickly embraced RISC-V and shows no signs of slowing down. For obvious reasons, academia has adopted RISC-V as a free teaching tool. In the enterprise market, companies of all sizes, from individuals to large corporations, are using the RISC-V ISA to design hardware for a wide range of applications, including Artificial Intelligence (AI), Virtual and Augmented Reality (VR and AR, collectively known as XR), automotive, cloud, high-performance computing (HPC), Internet of Things (IoT), storage, edge devices, and network infrastructure.
RISC-V is already on a clear path to gain significant market share in the embedded space, particularly in processors for auxiliary functions beyond the main application processors for devices. These are deeply embedded applications—end users may not know RISC-V is in the chip, but it performs critical functions such as power sequencing, state machine control, and voltage adjustment and monitoring.
However, every week we see headlines suggesting applications of RISC-V in high-performance scenarios. In June 2022, students from the University of Bologna collaborated with Italy’s largest supercomputing center, CINECA, to produce the first RISC-V supercomputer capable of balancing power consumption and performance. In September 2022, NASA announced that its next-generation High-Performance Space Computing (HPSC) processor would be based on RISC-V.
The Top 5 Advantages of RISC-V
RISC-V has been around for a while, and if you’re here, it’s because you’ve heard of it. But perhaps you still need to be convinced it is the future? If you still wonder about its potential and benefits, here are five advantages of RISC-V.
1. RISC-V Is an Open Standard
Let’s start with the basics. This is not a new concept, but let’s clarify what an open standard means.
An open standard does not necessarily mean open source. The RISC-V architecture is often described as ‘open source,’ which is inaccurate. As we explained in this article about RISC-V architecture licensing, RISC-V is like C, Wi-Fi, or LTE, with RISC-V International playing roles akin to ANSI, IEEE 802.11, and 3GPP in defining and managing the standards that people can freely choose to implement. But this is a written standard—not an implementation or microarchitecture. Like other open standards, RISC-V licenses can be either open source or commercial.
Thus, the RISC-V instruction set architecture (ISA) is open, meaning it is free, and anyone can download the documentation to use it freely without needing permission from anyone. This is fantastic as it allows smaller developers, companies, and groups (like academics) to design and build hardware without paying expensive proprietary ISA licensing fees and royalties. RISC-V is available for everyone.
2. RISC-V Is Attractive to University Researchers
You may already know that RISC-V started as a university research project at the University of California, Berkeley in 2010. As we just mentioned, it brings interesting financial aspects, so it is not surprising to see more and more university researchers exploring this.
Now, researchers can do this in two ways. Thanks to the work of various academic institutions like UC Berkeley, there are free open-source implementations of the RISC-V ISA available. These can be used in university projects to accomplish work that would be impossible without an open standard.
Furthermore, universities can also collaborate with RISC-V companies that are developing university curricula. It’s a great way to prepare today’s students to become tomorrow’s engineers! For example, Codasip has a university program. By collaborating with academia, we can accelerate the development of RISC-V IP and design automation. Allowing university researchers to engage with RISC-V is another key to their success in addressing future technological challenges.
3. RISC-V Allows Customization
This is where the true potential of RISC-V lies.
The RISC-V open standard allows for customization. However, most commercial companies do not support this. They sell standard, fixed products. Of course, if you design your own code, the freedom is there—but for most, this is not feasible. Some companies, like Codasip, offer the best of both worlds: customization and a rich RISC-V ecosystem. Because RISC-V is a layered and scalable ISA, these companies allow you to implement baseline instruction sets, optional extensions, and add custom extensions for specific applications.
Let me clarify one thing here. Do not confuse customization with configuration. Being able to choose the size of the cache is great, but that’s not customization. Customization means the ability to modify the instruction set architecture and microarchitecture. This is very powerful because that’s how you design a specific application processor that fits your unique needs.
4. RISC-V Gives You Freedom and Ownership
Now let’s take it a step further. By allowing customization, RISC-V enables your independence. You can work with an open standard that you can modify as needed. You can now do things your way while still being able to talk about the advantages of standard RISC-V architecture and software interoperability. This is a powerful thing that will be crucial in many industry sectors.
Let’s take the automotive industry as an example. Having differentiated capabilities is key to success in such a fast-evolving industry. Participants in the industry need top-notch quality IP and processor design automation technology that has the potential to accelerate innovation through processor customization.
5. RISC-V Ecosystem Is Rapidly Growing
The RISC-V standard is maintained by RISC-V International, which has absorbed over 3,100 RISC-V members from 70 countries.
There have been new processors and new ISAs in the past. But what sets RISC-V apart is its ecosystem. As Intel and Arm have shown, this is a key factor in the success of processor architectures. More ecosystem participants mean more software, more tools: this means more developers choosing that ISA, more commercial traction, which in turn accelerates a virtuous cycle attracting more ecosystem partners. It is this spiral that drives RISC-V’s market success.
RISC-V is for everyone. That is what makes it great. As more participants come in, from tool and IP providers to adopters, only more choices will lead to greater innovation.
How to Use RISC-V Chips in My Products?
Theoretically, the RISC-V ISA is open, and anyone can download and use it to design their custom silicon chips. In reality, it is not that simple.
Considering that, on average, over 75% of the time and cost of designing new chips is spent on functional verification—ensuring the chip works as expected before tape-out (physical implementation in silicon)—then verification follows.
As chip designers adopt smaller process nodes, this process becomes increasingly costly. Designing something at 3nm may require a design team of thousands of engineers working for tens of thousands of hours and costing hundreds of millions to complete the functional verification steps.
Compared to the costs associated with simulating, designing, and verifying RISC-V chips from scratch, licensing ready-made and pre-verified RISC-V cores from the growing list of commercial IP vendors often makes economic sense. Most vendors also offer customization services for specific workloads.
Of course, to achieve economies of scale that allow you to design something truly unique using the RISC-V ISA, you will need electronic design automation (EDA) tools that can simulate your design alongside the RISC-V ISA, design, and verify your design.
Source: Content from Semiconductor Industry Observation (ID: icbank) compiled from semiengineering
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