20 Key Indicators for Selecting AI Chips in Autonomous Driving

The central controller is the core component of autonomous driving, serving as the “brain” of the system. It typically needs to connect multiple cameras, millimeter-wave radars, lidar, and IMU devices to perform functions such as image recognition and data processing.

The domain controller, as an intelligent hardware, needs to handle the ultra-large computing power requirements of AI processing chips for environmental perception and deep learning, a CPU responsible for control decisions and logical operations, and an MCU for functional safety and vehicle control. The software layer includes operating systems, middleware, and application-layer AI algorithms.

20 Key Indicators for Selecting AI Chips in Autonomous Driving

The three main chips at the hardware level are:

The first part is usually a GPU or TPU, which handles large-scale floating-point parallel computing needs, primarily used for environmental perception and information fusion, including recognition, fusion, and classification of sensor data from cameras and lidar, such as the GPU unit of Xavier and Ascend 310.

The second part is mostly based on ARM architecture, similar to a CPU, mainly responsible for logic operations and decision control, handling high-precision floating-point serial computations.

The third part is primarily responsible for reliability and vehicle control, which means functional safety and redundancy monitoring. It does not require high computing power, but reliability must be ensured. The ISO26262 level requirement must reach ASIL-D, with Infineon’s TC297 or TC397 being commonly used.

On the software side, application-layer AI algorithms are generally developed by vehicle manufacturers or OEMs, reflecting the vehicle’s performance and differentiation; middleware is typically provided by domain controller developers, similar to ROS, and includes interface drivers and optimizations for the operating system.

Regarding the operating system, Huawei uses its self-developed HarmonyOS, and the MDC platform supports compatibility with Adaptive AUTOSAR; QNX is currently the best and only choice for automotive-grade systems but faces high costs; Linux and Autoware have gained the most users due to being open-source, especially Linux, which benefits from a strong engineer base and ecosystem, along with years of ROS application experience, making Linux-based operating systems very popular.

▍About Selecting AI Chips for Autonomous Driving

Currently, there are not many AI chips available on the market, especially those that have reached mass production status, with only Tesla, NVIDIA, and Mobileye. Other brands can currently obtain test samples through collaborative development, except for Tesla, which is self-developed and not available externally.

Taking NVIDIA Xavier as an example, relatively speaking, due to NVIDIA Xavier’s early launch and relatively complete ecosystem layout, developers can quickly build systems and develop AI applications, thus many companies design domain controllers based on the Xavier module.

Xavier SoC’s maximum computing power can reach 30 TOPs, including a Valta TensorCore GPU, an octa-core ARM64 CPU, dual NVDLA deep learning accelerators, an image processor, a vision processor, and a video processor, enabling it to simultaneously and in real-time process dozens of algorithms for sensor data processing, environmental perception, localization and mapping, and path planning.

The internal structure of the chip is shown in the following diagram:

NVIDIA provides the Xavier core module, and its interfaces are shown in the following diagram:

▍Key Indicators of Chips

1) Core:

The core is usually the spatial center. On one hand, it facilitates communication between the autonomous driving controller and peripheral sensors and actuators, while also protecting it. The core emphasizes the operational state, and the term core-down usually indicates an issue with CPU computation. The core emphasizes the core functions in the overall external functionality of the autonomous driving controller.

2) DMIPS:

This is mainly used to measure integer computing capability. It includes the number of instruction sets that can be executed per second and the amount of work that can be accomplished per second when implementing my test program, determined by CPU architecture, memory access speeds, and other hardware characteristics. It is a unit measuring the relative performance of a CPU when running the corresponding test program (in many autonomous driving chip evaluation scenarios, people commonly use MIPS as the unit for this performance metric).

3) Memory:

The main functions of the memory management unit include: mapping virtual addresses to physical addresses, controlling memory access permissions, and supporting high-speed caching.

4) DataFlash:

DataFlash is a high-capacity serial Flash memory product launched by the American company ATMEL, manufactured using Nor technology, suitable for storing data and program codes. Compared to parallel Flash memory, it requires fewer pins, is smaller in size, easier to expand, and connects simply with microcontrollers or controllers, making it reliable. Therefore, serial Flash controllers similar to DataFlash are increasingly used in autonomous driving controller products and measurement and control system evaluations.

5) ISP:

ISP, as the core of visual processing chips, includes functions such as AE (automatic exposure), AF (auto focus), AWB (automatic white balance), noise reduction, LSC (Lens Shading Correction), and BPC (Bad Pixel Correction), ultimately saving Raw Data to be sent to video codecs or CV, etc. By using ISP, better image quality can be achieved, hence the requirements for ISP on autonomous vehicles are high, such as integrating dual-channel or even triple-channel ISPs. Generally, ISP is integrated within the AP (which is a key differentiator for many AP chip manufacturers), but independent ISPs have emerged due to changing demands, mainly for more flexible configurations and to complement the deficiencies of ISPs within AP chips.

6) Computing Power:

The realization of autonomous driving relies on environmental perception sensors to collect information about road conditions, transmitting the collected data to the vehicle’s central processor for processing to identify obstacles, drivable roads, etc. Based on the recognition results, it plans paths and sets speeds to automatically control the vehicle’s movement. The entire process must be completed in an instant, with delays controlled within milliseconds or even microseconds to ensure the safety of autonomous driving. The requirements for computing power on the central processor are very high to achieve instantaneous processing, feedback, decision-making, and execution.

In autonomous driving, the most computing-intensive task is visual processing, accounting for more than half of the total computing power demand. Moreover, as the level of autonomous driving increases, the demand for computing power increases at least tenfold. Level 2 requires 2 TOPS of computing power, Level 3 requires 24 TOPS, Level 4 requires 320 TOPS, and Level 5 requires over 4000 TOPS.

Having computing power alone is not enough. Considering the complexity of automotive applications, automotive processors also need to consider computing power utilization, compliance with automotive specifications, and safety standards. The theoretical computing power depends on operational precision, the number of MACs, and operating frequency.

Theoretical computing power is derived from the multiplication operations in the Net convolution layers, where each multiply-accumulate (MAC) counts as two OPS. Convolution operations account for over 90% of DL NET, and other auxiliary operations or operations from other layers can be neglected. The total number of multiplication operations across all convolution layers in SSD is 40G MACs, so the theoretical computing power is 80GOPS.

Among them,

The difference between real and theoretical values is significant. Considering other operation layers, the actual hardware utilization must be higher. The main factors determining the actual computing power are memory (SRAM and DRAM) bandwidth, actual operating frequency (i.e., supply voltage or temperature), and algorithm batch size.

7) Power Consumption:

In the highest performance mode, if the power consumption level of the autonomous driving controller’s chip is high, even if its performance is strong, it may lead to unforeseen risks, such as increased heat generation and doubled power consumption. These results are undoubtedly a “nuclear bomb” for new energy vehicles. Therefore, we need to fully consider power consumption indicators in the early design of autonomous driving chips.

8) 3D GPU:

GPUs are designed for high throughput to handle large-scale parallel computing. The control unit of the GPU can merge multiple accesses into fewer accesses. GPUs allocate more transistors for execution units rather than for complex data caches and instruction control like CPUs. Due to their powerful floating-point computing capabilities, GPUs are increasingly used in image or video processing applications in the front end of intelligent vehicles, as well as in mainstream designs for high-performance computing in central controllers.

9) Rich IO Interface Resources:

The main control processor for autonomous driving requires a rich array of interfaces to connect various sensor devices. Currently, the most common sensors for autonomous driving include: cameras, lidar, millimeter-wave radars, ultrasonic radars, combined navigation, IMU, and V2X modules.

The interface types for cameras mainly include: MIPI CSI-2, LVDS, FPD Link, etc.
Lidar is generally connected via standard Ethernet interfaces.
Millimeter-wave radars transmit data via CAN bus.
Ultrasonic radars typically use LIN bus.
Common interfaces for combined navigation and inertial navigation IMU are RS232.
V2X modules generally also use Ethernet interfaces for data transmission.

In addition to the IO interfaces required for the above sensors, other common high-speed and low-speed interfaces are also needed, such as: PCIe, USB, I2C, SPI, RS232, etc.

10) PCIe:

As a local bus for the CPU, its main features are high data transfer throughput and low latency.

11) Safety Goal::

The functional safety goal is the core design requirement for the entire autonomous driving central controller. Due to its impact on the single-point failure analysis results in the overall design of autonomous driving functions, it is necessary to fully consider whether it can completely meet the system’s functional safety design requirements for hardware in the early hardware design phase.

12) OTA:

Remote upgrades allow users to fix software faults, significantly shortening intermediary steps and enabling software to reach users quickly while adding new features to vehicles, broadening the scope of “services” and “operations.” Therefore, whether the central controller chip supports OTA is essential for reducing costs for automotive manufacturers and users, including recall costs for manufacturers and time costs for users, while enhancing user experience and increasing the vehicle’s added value.

13) Packaging Type:

The size and pin definitions of the controller packaging affect the overall driver’s controller installation form and the distribution of connections to peripheral components. Additionally, whether the interfaces are waterproof can allow more freedom in the installation environment of the controller. However, currently, domain control interfaces are not waterproof.

14) Temperature/Voltage:

The temperature control range of the controller includes its storage and usage environmental temperatures. If the actual vehicle confirms that the storage and usage environmental temperature of the millimeter-wave controller assembly exceeds this value, adjustments must be made accordingly to meet OEM requirements, ensuring that suppliers do not cause recalls due to hardware design defects. Particularly when computing power exceeds 100 and power consumption exceeds 60W, rising temperatures may require active cooling to ensure heat can be dissipated in time without affecting the controller’s normal operation. Active cooling generally includes: fan cooling and water cooling.

15) Automotive Standards and Functional Safety:

Compared to consumer electronics, automotive chips have the highest requirements for safety and reliability.

Automotive chips operate under extreme conditions of “-40℃ to 125℃” and severe vibrations. To ensure that automotive electronic products meet high standards for operating temperature, reliability, and product lifespan, the Automotive Electronics Council (AEC) has established relevant quality certification standards, with AEC-Q100 being the certification standard for automotive integrated circuit stress testing. The AEC-Q100 standard has become an industrial standard for automotive electronic products in terms of reliability and product lifespan over the years.

In addition to meeting automotive-grade requirements, autonomous driving chips must also comply with the certification requirements defined by the ISO 26262 standard for “Functional Safety (Fusa).” The design requirements for functional safety on chips aim to identify and correct potential failures (divided into: system failures and random failures) as much as possible. System failures are essentially design flaws, primarily ensured through design and implementation process specifications, while random failures rely more on special failure detection mechanisms in chip design.

ISO 26262 classifies safety levels, commonly ASIL-B and ASIL-D levels. ASIL-B requires chips to cover 90% of single-point failure scenarios, while ASIL-D requires 99%. The larger the chip area and the more transistors, the higher the corresponding failure rate.

16) Chip System:

Whether the controller supports integrated control methods like MCU+MPU or only single-chip control forms.

17) Supply Chain Assurance:

The high market demand has led to semiconductor supply chain and capacity shortages, with various “natural disasters and man-made disasters” disrupting the normal production rhythm of semiconductors, making it difficult to resolve the contradiction between demand and capacity in the short term.

In the context of the global chip supply chain being so tight, supply chain assurance is also quite challenging for domain controller suppliers. When vehicle manufacturers choose domain controller suppliers, the supply capacity of their partner chip manufacturers is also an important consideration.

In 2022, the chip shortage continued to affect the automotive industry, with some manufacturers beginning to explore new semiconductor supply strategies, with some even bypassing Tier 1 and directly seeking chip design manufacturers. More advanced manufacturers have started to participate in the chip design and development process. For instance, several automotive companies have established strategic partnerships with autonomous driving AI chip manufacturers such as Black Sesame and Horizon. Even more, some have directly penetrated the semiconductor supply chain, integrating chip design into their internal processes, a model known as the “OEM-Foundry-Direct” model, represented by companies like Tesla and BYD.

18) Market Positioning:

When selecting a main control chip, the first thing to consider is the market positioning of the domain controller: what functions are intended to be achieved and in which price range of vehicles it will be configured.

If the target positioning is to create an L1~L2 level product for assisted driving aimed at mass production, then cost sensitivity is high when selecting chips. Such domain control products should choose mid-to-low-end chips.

If the target is to develop an L4 level autonomous driving product for limited scenarios, customers may prefer to create a customized product, such as positioning for Robotaxi, intending to operate a model and refine the algorithm. Its volume may not be particularly large, so cost sensitivity when selecting chips is lower, but performance must be sufficiently good and stable.

19) Chip Roadmap:

According to Liu Wei, Deputy General Manager of Neusoft Ruichi, from the perspective of cooperation with chip companies, it is essential to see whether they are mainstream chip manufacturers and if they have a continuous product roadmap. For example, some chip manufacturers may develop a good chip but fail to provide updates or upgrades afterward. Therefore, building domain controllers around such chips may face significant issues in product iteration and upgrades.

Similarly, Li Maoqing, head of intelligent driving system design at Joyson Electronics, also mentioned the same viewpoint: “In the design of domain controller systems, besides focusing on the functional performance of the chip itself, it’s crucial to understand the product roadmap of the chip company, whether they have a flexible family of chip series, and if subsequent chips can be PIN to PIN upgraded on the hardware platform, thus enhancing hardware performance while reducing development costs?”

20) Chip Ecosystem (Toolchain):

The entire software toolchain of the chip or the development of certain algorithms must meet customer needs. In other words, the chip’s ecosystem and whether it has a good ecosystem to support customers in practical development is also one of the important considerations for OEMs or Tier 1 when selecting chips.

NVIDIA’s chip ecosystem is relatively advanced in the industry, including developers, available application software, and a wealth of tools and libraries:

It can provide a wealth of software algorithm talent for the automotive field;
A large number of algorithm models and related application software have been trained in the general AI field;
A unified hardware and underlying software interface architecture (CUDA-X) can be easily ported to the automotive sector;
Due to a large number of users, partners have contributed a wealth of libraries and tools to the CUDA platform.

ZhiXing Technology’s Hardware R&D Director explained: “Many OEMs are using NVIDIA’s Orin chip, not only because it is a high-performance platform, but also because it provides the entire software toolchain, even some low-level code and algorithm code can be provided; developers can adapt more easily, leading to the development of a viable advanced autonomous driving computing platform. When selecting chips, it is more about choosing an ecosystem rather than just the chip itself.”

Based on the above important factors in the selection process for autonomous driving domain controllers, we conducted a statistical analysis of the mainstream controller chips in the market and derived the following comparative analysis results:

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