PART01
IEEE ICTA 2025
The 8th IEEE International Conference on Integrated Circuits Technology and Applications (ICTA 2025) will be held from October 22 to 24 in Macau, China. Professor Cheng Lin has been invited to serve as the chair of the conference steering committee. The PMIC laboratory has two papers selected, with master’s students Zhang Heng and Hua Wanling as the first authors, and Professor Wang Jing as the corresponding author. The research topics include an ECG/BioZ biological signal acquisition analog front-end chip based on frequency division multiplexing and a 24.2μW, 125dB dynamic range bioelectrical impedance analog front-end chip with hybrid mode baseline cancellation.
Zhang Heng presented his work titled “An ECG/BioZ Acquisition Analog Front-End Using Frequency Division Multiplexing with a High Input Impedance” at the “High-Precision Amplifiers” technical session. To adapt to the dry electrode acquisition environment, this work innovatively proposed a high input impedance frequency division multiplexing analog front-end.
Hua Wanling presented her work titled “A 24.2-μW 125-dB Dynamic-Range Bio-Impedance AFE with Hybrid-Mode Baseline Cancellation” at the “High-Precision Amplifiers” technical session. To adapt to two-electrode bioelectrical impedance detection applications, this work innovatively proposed a novel hybrid mode baseline cancellation technology.
PART02A-SSCC 2025
The 2025 Asian Solid-State Circuits Conference (A-SSCC) will be held from November 2 to 5 in Daejeon, South Korea.
At this conference, one paper from the PMIC laboratory was successfully selected, co-authored by Dr. Tang Kui and doctoral student Sun Wen, with Professor Cheng Lin as the corresponding author, and Sun Wen responsible for the on-site presentation.
In the “Switching-Based Power Converters” technical session, Sun Wen reported on “A 2.7V-Input 90.5%-Peak-Efficiency 6-Phase Integrated Voltage Regulator with 5% Current Sensing Error and Built-In Loop Stability Calibration.” This work addresses the production consistency and high reliability requirements of high-frequency integrated power modules, proposing two key innovative circuit technologies, resulting in a high-frequency integrated voltage regulator (IVR) with on-chip loop stability self-calibration and high-precision current sampling capabilities.
This chip, based on a 28nm process, achieves a 2.7V input six-phase high-frequency integrated voltage regulator with a peak efficiency of 90.5% and a peak current density of 12A/mm2. It uses a Flip-Chip packaging structure, integrating output capacitors within the package and embedding six-phase magnetic core inductors in the PCB. This solution can automatically complete loop stability calibration without relying on external instruments, improving current sampling accuracy (3σ) by 24.4%, significantly enhancing production consistency.
· Striving Forward Together for a Brighter Future ·
With the successful conclusion of these two international academic conferences, an exciting journey comes to an end, but the PMIC’s exploration of the unknown realms of chip technology is far from over. In this feast of ideas, we sparked creativity and left our mark on exploration. The road ahead is long, and innovation never ceases; PMICers will embrace their passion and continue steadfastly towards the stars and seas of chip technology!