The China Semiconductor Industry Association announced on April 11 a notification regarding the rules for determining the origin of integrated circuits, clearly stating that the ‘wafer fabrication location’ will be considered as the origin. Coupled with China’s adjustment of import tariffs on American goods to 125%, there is a hidden strategy behind this move!
1. What is the Wafer Fabrication Location of Chips?
Chip Manufacturing
Chip manufacturing can be simply divided into three parts: 1. Chip Design 2. Photolithography and Etching 3. Packaging and Testing
Wafer Fabrication The wafer fabrication stage refers to the phase before photolithography, which can be understood as a trial production stage to verify the feasibility of chip design. The goal is to manufacture small batches of samples to test the functionality, performance, and reliability of the manufacturing process. If the wafer fabrication is successful, it proceeds to mass production. If it fails, the design needs to be corrected and re-fabricated.
Wafer Fabrication Location The wafer fabrication location refers to the factories in various countries that can produce chips (photolithography and etching), such as Samsung Electronics in South Korea, Intel in the United States, and TSMC, SMIC, and Hua Hong Semiconductor in China.
2. Where is the Hidden Strategy Behind the Policy?
Establishing Chip ‘Origin’ Standards: Precisely Targeting ‘Origin Laundering’
Chip manufacturing is characterized by high globalization, with design, wafer fabrication, and packaging often dispersed across different countries. For example, a chip designed by an American company may be fabricated in South Korea, then packaged in Malaysia, and finally enter China through transshipment trade. In this model, the U.S. can evade tariffs by ‘laundering’ the origin through a third country.
China’s clear definition of ‘wafer fabrication location’ as the origin directly locks in on the core stages of chip manufacturing (photolithography and etching).
Countering the U.S. Chip Industry Chain Layout: Striking at the Root
The U.S. semiconductor industry has long relied on a ‘design-led, outsourced manufacturing’ model. Companies like Intel and Texas Instruments, which are Integrated Device Manufacturers (IDMs), account for only 19% of global capacity, while over 80% relies on overseas foundries like TSMC and Samsung. The impact of China’s new regulations lies in: Weakening U.S. Domestic Manufacturing: If U.S. companies use domestic wafer fabs (such as Intel’s factory in Ohio) for wafer fabrication, their chips entering China will face a 125% tariff, completely losing price competitiveness. Forcing Industry Chain Shifts: U.S. Fabless companies (like Qualcomm and NVIDIA) may shift their wafer fabrication orders from U.S. foundries like GlobalFoundries and Micron to foundries in South Korea or Taiwan and mainland China to avoid tariffs.
TSMC’s Affiliation: Strategic Ambiguity and Initiative
As the world’s largest wafer foundry (holding 55% of the global market share), TSMC’s wafer fabrication location determination is crucial for the effectiveness of China’s policy:
Separation of Geographic and Economic Affiliation: TSMC’s wafer fabrication plants are located in Taiwan, which, according to the new regulations, is considered ‘of Chinese origin’, but the U.S. has long attempted to include it in the ‘Chip Quad Alliance’ supply chain.Dual Constraints: On one hand, TSMC’s wafer fabrication for mainland Chinese companies (like Huawei) can be seen as ‘domestic chips’. On the other hand, if it fabricates for U.S. companies, it may face pressure from the U.S. to shift the wafer fabrication location, which would significantly increase costs.
Promoting Domestic Substitution and Industrial Upgrading
Benefiting SMIC, Hua Hong, and Others: If U.S. companies shift their wafer fabrication orders to mainland Chinese foundries to avoid tariffs, it will directly enhance domestic capacity utilization.Accelerating Technological Breakthroughs: The domestic 28nm mature process has achieved mass production, and the 14nm process is entering the ramp-up phase. The new regulations provide market assurance for local wafer fabrication demand, supporting technological iteration.Building an Independent Standard System: Through origin rules and tariff leverage, China is reshaping the global semiconductor trade rules and weakening the influence of the U.S.-led WASSENAAR Arrangement.
Conclusion: A Multi-Dimensional Battle of ‘Rules + Industry + Geopolitics’
China’s combination of policies (origin rules + 125% tariffs) essentially aims to cut the global semiconductor supply chain through rule-making authority, binding U.S. companies in a dilemma of ‘high domestic manufacturing costs’ and ‘high risks of overseas transfer’. Its strategy lies not only in short-term tariff deterrence but also in long-term efforts to shift the global chip manufacturing focus towards East Asia, creating a strategic window for domestic substitution. The contest between think tanks in China and the U.S. has already shown a clear outcome.