1Introduction to the Independent Watchdog
The watchdog is a hardware timer whose main function is to forcibly reset the entire system when a software fault or program runaway occurs, allowing it to return to normal operation. It is an independent system that can continue to operate even if the main clock fails, thus ensuring high reliability.
The STM32F4 has two watchdog peripherals (independent and window) that can be used to detect and resolve faults caused by software errors; when the counter reaches a specified timeout value, it triggers an interrupt (only applicable to the window watchdog) or generates a system reset.
The Independent Watchdog (IWDG) is driven by its dedicated low-speed clock (LSI) and thus remains operational even when the main clock fails.
The window watchdog (WWDG) clock is provided by the APB1 clock after prescaling, and it detects abnormal delays or premature operations of the application through a configurable time window.
The IWDG is best suited for applications that require a watchdog to operate completely independently of the main program and have lower time precision requirements.
2How to Feed the Dog
From the clock perspective, the watchdog can only be LSI internal low-speed clock
3 Programming
void IWDG_Init(u8 prer,u16 rlr){ IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);//Enable write access to IWDG->PR and IWDG->RLR IWDG_SetPrescaler(prer);//Set IWDG prescaler IWDG_SetReload(rlr); //Set IWDG reload value IWDG_ReloadCounter();//Reload IWDG_Enable(); //Enable watchdog} //Feed the independent watchdogvoid IWDG_Feed(void){ IWDG_ReloadCounter();//Reload}4 Testing
In the case of not feeding the watchdog, the test results show continuous resets.
After adding the watchdog feed, it will no longer reset.
It is important to note that the feeding time must be quick; if there is too much delay, the watchdog may reset before it can be fed.
