This article mainly documents the verification methods for the SPI interface on the Feiteng platform, providing a brief introduction to the SPI interface and offering guidance on testing this interface within a system. 1. SPI Interface Overview SPI is a synchronous, full-duplex, master-slave interface. Data from the master or slave is synchronized on the rising or falling edge of the clock. The master and slave can transmit data simultaneously. This article focuses on the commonly used 4-wire SPI interface.