From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Source: Fresh Date Classroom

Original Author: Little Date Jun

This article mainly introduces the process of chip manufacturing.

Oxidation

First, on the wafers that have been cut and polished, we need to perform an oxidation step. The purpose of oxidation is to form a protective film (oxide layer) on the fragile surface of the wafer. The oxide layer can prevent the wafer from being affected by chemical impurities, leakage currents, and etching.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

The oxidation process includes thermal oxidation, plasma-enhanced chemical vapor deposition (PECVD), and electrochemical anodic oxidation, among others. The most commonly used method is thermal oxidation, which forms a thin and uniform silicon dioxide layer at high temperatures of 800~1200°C. Depending on the gases used during oxidation, it can be classified into dry oxidation and wet oxidation.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Dry oxidation involves flowing pure oxygen over the wafer surface, reacting with silicon to form a silicon dioxide layer. Wet oxidation uses both oxygen and highly soluble water vapor simultaneously. Dry oxidation is slower but results in a thinner and denser oxide layer, while wet oxidation is faster but produces a relatively thicker and less dense protective layer. Currently, dry oxidation is the mainstream technology in semiconductor manufacturing, while wet oxidation is more commonly used for non-critical layers or specific thick film requirements.

Photolithography (Coating, Pre-bake, Exposure, Post-bake, Development)

Next, we finally arrive at the most crucial step—photolithography.

The photolithography machine, which has been a point of concern for us in recent years, is related to this step. Simply put, photolithography is like a printing machine that “etches” the chip circuit diagram onto the wafer.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Photolithography can be divided into three main steps: coating, exposure, and development. Let’s look at them one by one.

First, there is coating. This material, called photoresist, is sometimes also referred to as resist, and it is a light-sensitive material.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

There are two types of photoresist: positive and negative. Positive resist changes its molecular structure upon exposure to a specific light beam, making it easier to dissolve. Negative resist, on the other hand, becomes harder to dissolve after exposure. In most cases, positive resist is used.

During coating, the wafer is spun at a speed of 1000~5000 RPM. Then, a small amount of photoresist is poured onto the center of the wafer. Due to centrifugal force, the photoresist gradually spreads over the entire surface of the wafer, forming a uniform coating layer that is 1 to 200 micrometers thick.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Coating

It is worth mentioning that photoresist is also a highly technical material. Most of the photoresist used domestically comes from Japan. After coating, the wafer undergoes a soft bake to slightly solidify the photoresist. This step is called “pre-bake.” Next, the photolithography machine comes into play for exposure. The wafer is placed in the photolithography machine, along with the mask.

The mask, formally known as the photolithography mask, is also called a resist, and its English name is mask. It is the core of the photolithography process and an important output during the chip design phase. (Later, Little Date Jun will specifically introduce the chip design phase.)

The mask is a glass or quartz plate with a pattern layer made of opaque material (such as chromium). The pattern on it is essentially the blueprint of the chip, which is the integrated circuit layout.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Mask

In the photolithography machine, both the wafer and the mask are precisely fixed. Then, the special light source of the photolithography machine (mercury vapor lamp or excimer laser) emits a beam (ultraviolet light), which passes through the openings in the mask and multiple lenses (to converge the light), ultimately projecting onto a small area of the wafer. The fine circuit pattern is thus “projected” onto the wafer.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

For positive photoresist, the exposed areas become easier to dissolve, while the unexposed areas remain intact. The mechanical positioning of the wafer and mask continuously moves, and the beam keeps shining. Ultimately, the circuit patterns for dozens to hundreds of chips are completed across the entire wafer.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Photolithography machine working process

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

After the wafer comes out of the photolithography machine, it must undergo another heating baking process (baking for 20 minutes at 120~180°C), referred to as post-bake. The purpose of post-bake is to ensure that the photochemical reactions in the photoresist are fully completed, compensating for any insufficient exposure intensity. Additionally, post-bake can reduce the concentric rings caused by the standing wave effect after the development of the photoresist.

Next is development. After exposure, the wafer is immersed in a developer solution. The developer solution removes the exposed photoresist (positive resist), revealing the pattern.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Then, the wafer is rinsed and dried, leaving a precise circuit pattern.

About the Photolithography Machine

Here, let’s take a moment to discuss the photolithography machine. Traditional photolithography technology typically uses deep ultraviolet light (DUV) as the light source, with a wavelength of about 193nm (nanometers). The wavelength of the light wave limits the minimum feature size that can be manufactured in the photolithography process (i.e., the resolution limit). As chip processes continue to evolve, traditional DUV photolithography technology gradually fails to meet the requirements. Thus, EUV photolithography machines were developed. EUV photolithography machines use extreme ultraviolet light (EUV) as the light source, with a wavelength of only 13.5nm, much smaller than DUV. This allows EUV photolithography to create smaller feature sizes, meeting the manufacturing needs of advanced chip processes (such as 7nm, 5nm, 3nm).

EUV photolithography has extremely strict requirements for beam concentration and process precision. For example, the length of the mirrors used for reflection in EUV photolithography is 30cm (centimeters), and the surface undulation must not exceed 0.3nm (nanometers). This is equivalent to requiring that a railway track from Beijing to Shanghai cannot have an undulation greater than 1mm.

The extremely high technical specifications make the manufacturing of EUV photolithography machines very difficult. There are only a handful of companies worldwide capable of developing and manufacturing EUV photolithography machines. The leading company in this field is the renowned Dutch company ASML.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

According to information disclosed by ASML, each EUV photolithography machine contains 100,000 parts, 40,000 bolts, 3,000 wires, and 2 kilometers of hoses. Most of the components inside the EUV photolithography machine come from the most advanced products from various countries, such as gratings from the United States, lenses from Germany, bearings from Sweden, and valves from France.

The cost of a single EUV photolithography machine reaches up to 100 million USD, and it weighs 180 tons. Each transport requires 40 containers, 20 trucks, and three flights to complete. Each installation and debugging also takes at least a year. ASML’s production of EUV photolithography machines is limited to a maximum of 30 units per year, and they are reluctant to sell them to us. The most severe bottleneck in the entire chip industry is this EUV photolithography machine.

Etching

Now, although the pattern has been revealed, we have only removed part of the photoresist. What we really need to remove is the underlying oxide layer (the part not protected by the photoresist).

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

In other words, we need to continue “digging down.” The process to be used at this time is etching.

Etching processes can be divided into wet etching and dry etching. Wet etching involves immersing the wafer in a liquid solution containing specific chemicals, using chemical reactions to dissolve the semiconductor structures (oxide film) that are not protected by the photoresist. Dry etching uses plasma or ion beams to bombard the wafer, removing the unprotected semiconductor structures.

There are two concepts to pay attention to in the etching process: isotropy (anisotropy) and selectivity.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

As shown in the figure above, during wet etching, the etching occurs in all directions, which is called “isotropic.” In contrast, dry etching only etches in the vertical direction, which is called “anisotropic.” Clearly, the latter is better.

During etching, both the oxide layer and the photoresist are etched. Under the same etching conditions, the etching rate of the photoresist compared to the etching rate of the material being etched (oxide layer) is called selectivity. Obviously, we want to etch as little photoresist as possible while etching more oxide layer.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Currently, dry etching dominates and is the preferred choice in the industry because it has stronger fidelity. Wet etching is difficult to control in direction. In advanced processes like 3nm, it can easily lead to reduced line widths or even damage circuits, thereby reducing chip quality.

Doping (Ion Implantation)

At this point, the surface of the wafer has been etched with various grooves and patterns. Next, let’s take a look at the doping process. Each transistor is based on a PN junction. As shown in the figure below (MOSFET transistor, NPN), it includes P-well, N-well, channel, gate, etc.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

In the previous photolithography and etching steps, we only dug holes. Next, we need to construct the P-well and N-well based on these holes. Pure silicon itself is non-conductive; to make non-conductive pure silicon into a semiconductor, we must introduce some impurities (called dopants) to change its electrical properties. For example, introducing phosphorus, antimony, and arsenic into silicon material can create an N-well. Introducing boron, aluminum, gallium, and indium can create a P-well.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

N has free electrons. P has many holes and a small number of free electrons. By applying a voltage to the gate on the channel, we can attract electrons from P, forming an electron channel (channel). A current is formed between the two N regions when voltage is applied.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

In the figure, the bottom is the P-well substrate. The two holes are the N-wells. In other words, when making this NPN transistor, boron doping (with a small amount of phosphorus) was already used on the substrate before the initial oxidation (for ease of reading, I did not mention this step earlier).

Now, the dug-out parts can be doped with phosphorus to become N-wells. Do you understand? The purpose of doping is to create PN junctions and transistors. Doping includes two processes: thermal diffusion and ion implantation. Due to the difficulty of achieving selective diffusion with thermal diffusion, most of the time, ion implantation is used unless specific requirements dictate otherwise.

Ion implantation involves using a high-energy particle beam to directly shoot impurities into the silicon wafer. The ion source is usually a gas (for ease of operation), such as phosphine (PH3) or boron trifluoride (BF3). When the gas passes through the ionization reaction chamber, it is bombarded by high-speed electrons, causing the electrons of the gas molecules to be knocked off, turning them into ions.

At this point, the ion composition is quite complex, including boron ions, fluorine ions, etc. A mass spectrometer is used to create a magnetic field that causes the ions to deflect, allowing the desired ions to be selected (different ions deflect at different angles) and then collide with the wafer to complete ion implantation.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Structure of an ion implantation machine (Source: “Introduction to Semiconductor Manufacturing Technology”)

At this point, the silicon dioxide layer (oxide layer) becomes the barrier layer for ion implantation. After ion implantation, the silicon surface needs to be heated to 900°C for annealing. Annealing allows the implanted dopant ions to further diffuse uniformly into the silicon wafer. It also helps repair the damage caused to the wafer lattice during ion implantation (ion implantation disrupts the lattice of the silicon substrate).

Thin Film Deposition

Having discussed so much, we have been “digging holes.” Next, we will start to “build buildings.” Let’s first look at a structural diagram of a finished chip (partial example):

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

You will find that this is a very complex three-dimensional structure. It has many layers, somewhat like a building, and also resembles a complex three-dimensional traffic network.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

At the very bottom of this structure is the silicon substrate we painstakingly created earlier, which serves as the foundation of the chip building. As the base of the chip building, the substrate must have good thermal stability and mechanical properties, and it also needs to provide some electrical isolation to prevent interference.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

On top of the substrate are the main parts of numerous transistors. Above the substrate are many core components, such as the source, drain, and channel of the transistors.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

FinFET Transistor (Fin Field-Effect Transistor)

The gate of the transistor mainly uses a “polysilicon layer.” This is because polysilicon material has better conductivity and stability, making it suitable for controlling the switching state of the transistor. The connecting metals for the source, drain, and gate of the transistor are usually tungsten.Moving up, we need to construct numerous pathways (circuits) to connect these transistors, forming complex functional circuits.For this interconnection, metals are of course more suitable. Therefore, metals such as copper are primarily used. We can refer to this layer as the metal interconnect layer.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Since everything is metal, it is easy to short-circuit. Therefore, some insulating layers (films) are also needed to isolate the circuits.

At the very top of the chip, a passivation layer is generally added. The passivation layer mainly serves a protective function, preventing contamination, oxidation, and mechanical damage from external factors (such as moisture and impurities).

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

So, how are so many layers built up?The answer is thin film deposition.

This layer upon layer of structure is actually a series of thin films (with thicknesses ranging from sub-micrometer to nanometer scale). Some are thin metallic (conductive) films, while others are dielectric (insulating) films. The processes for creating these films are called deposition.Deposition includes chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD).Chemical vapor deposition (CVD) generates solid materials through chemical reactions, depositing them onto the wafer to form thin films. It is commonly used to deposit insulating thin films (layers) such as silicon dioxide and silicon nitride.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Chemical Vapor Deposition Example

Chemical vapor deposition (CVD) has many varieties. Plasma-enhanced chemical vapor deposition (PECVD, which was also mentioned during oxidation) is an advanced chemical vapor deposition method that uses plasma to generate reactive gases.

This method lowers the reaction temperature, making it very suitable for temperature-sensitive structures. Using plasma can also reduce the number of deposition cycles, often resulting in higher quality thin films.Physical vapor deposition (PVD) is a physical process.

In a vacuum environment, argon ions are accelerated to bombard the target material, causing the target material’s atoms to be sputtered out and deposited on the wafer surface in a snowflake-like manner, forming thin films. This is physical vapor deposition. It is commonly used to deposit metallic thin films (layers) to achieve electrical connections.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Sputter Deposition Example

The process of forming metal layers (such as copper and aluminum) through thin film deposition techniques (such as PVD sputtering and electroplating) is also referred to as metallization or metal interconnection in the industry.Metal interconnection includes aluminum interconnect and copper interconnect. Copper has lower resistance and higher reliability (more resistant to electromigration), making it the mainstream choice today.

Atomic layer deposition (ALD) is a method that allows substances to be deposited on the substrate surface in the form of single atomic layers, which is somewhat similar to ordinary chemical deposition.Atomic layer deposition is an alternating deposition process. It first performs a chemical deposition, then uses inert gas to blow away the remaining gas, and then introduces a second gas to react chemically with the first gas adsorbed on the substrate surface. This process is repeated, with each reaction depositing only one layer of atoms.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

The advantage of this method is its precision. It allows for precise control of thin film thickness by controlling the number of deposition cycles.

Cleaning and Polishing

During the processes of photolithography, etching, deposition, etc., repeated cleaning and polishing are required.

Cleaning uses high-purity chemical solutions to remove residual impurities and contaminants from the surface, ensuring the purity of subsequent processes.

Polishing eliminates surface undulations and defects on the wafer, improving the precision of photolithography and the reliability of metal interconnections, thus enabling higher density and smaller size integrated circuit designs and manufacturing.

If there is no CMP process, this building would be a “crooked building.” Subsequent processes cannot proceed, and the chips produced cannot guarantee quality.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Repetitive Cycle

As mentioned earlier, chips consist of dozens or even hundreds of layers.In fact, the construction of each layer is a repetitive cycle of photolithography, etching, deposition, cleaning, and CMP.

As shown in the GIF below:

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Slow-motion breakdown:

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

After N cycles of repetition, the chip building has finally “topped out”! Celebrate! Celebrate!

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Probe Testing

After the previous processes, square small grids have formed on the wafer, which are the dies.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

The term “Die” may surprise you at first, as it sounds like “death.” However, it has nothing to do with “death.” This “Die” originates from the German word “Drahtzug” (wire drawing process) or is related to the cutting action “Diced.” There are also claims that early semiconductor engineers used “Die” to describe the independent units cut from the wafer, similar to coin molds.

With the building topped out, the first thing to do is testing.Testing is to verify whether the semiconductor chip’s quality meets standards. Those dies that fail the tests will not enter the packaging step, helping to save costs and time.

Electrical Die Sorting (EDS) is a testing method for wafers, typically divided into five steps, as follows:

Step 1: Electrical Parameter Monitoring (EPM).

EPM tests each device on the chip (including transistors, capacitors, and diodes) to ensure their electrical parameters meet standards. The electrical characteristic data provided by EPM will be used to improve process efficiency and product performance (not for detecting defective products).

Step 2: Wafer Aging Test.The wafer is subjected to testing at a certain temperature and voltage to identify products that may have early defects.

Step 3: Probe Testing (Chip Probing).At this point, the chip has not yet been cut and packaged, and its pins (or pads) are directly exposed.

Therefore, probe testing involves using precision probe stations and probe cards to connect the chip pins with automated test equipment (ATE). ATE applies predetermined test signals to check whether the chip meets preset performance standards, such as operating voltage, current consumption, signal timing, and correct execution of specific functions. Probe testing can also conduct electrical tests (detecting short circuits, open circuits, leakage, etc.), as well as temperature, speed, and motion tests.

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

Step 4: Repair.Yes, some defective chips can be repaired by simply replacing the problematic components.

Step 5: Marking.Dies that fail the tests need to be marked. In the past, we needed to use special ink to mark defective chips to ensure they could be visually identified. Nowadays, the system automatically sorts them based on test data values.

To summarize the entire process, see the diagram below:

From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

References

1. “How Are Chips Made?” New Stone Age Park, Bilibili;

2. “Super Long Article Analyzing the Full Process of Chip Manufacturing,” Hu Shuo Man Man Tan, Bilibili;

3. “Making Chips from Sand,” Tan San Quan, Bilibili;

4. “Detailed Explanation of Chip Manufacturing Process,” Semika;

5. “Detailed Explanation of Chip Manufacturing Process,” Semiconductor Industry Observation;

6. “Detailed Explanation of Steps, Technologies, and Processes in Semiconductor Manufacturing,” Love in Qixi, Zhihu;

7. “Understanding the Entire Process of Chip Production in One Article,” Chip Semiconductor;

8. “10 Key Steps in Chip Manufacturing,” Zhongzhi Think Tank;

9. “Eight Steps in Semiconductor Product Manufacturing,” Lam Research;

10. “Steps, Technologies, and Process Diagrams in Semiconductor Manufacturing,” Beigang Nanxiang, Automotive Semiconductor Hardware, Zhihu;

11. “Understanding the Chip Production Process in One Article,” Eleanor Wool Sweater;

12. “The Birth of a Chip,” Tech Punk Roy;

13. “Full Process of Chip Manufacturing,” Zhou Jia, Chip Assistant;

14. “Semiconductor Manufacturing Technology,” Quark, Seda, Han Zhengsheng, Electronics Industry Press;

15. “Illustrated Introduction: Semiconductor Manufacturing,” Sato Junichi, Wang Yiwen, Wang Shunya, Machinery Industry Press;

16. Wikipedia, YouTube, various manufacturers’ official websites.

END

Reprinted content only represents the author’s views

Does not represent the position of the Semiconductor Institute of the Chinese Academy of Sciences

Editor: One Two

Responsible Editor: Six Dollar Fish

Submission Email: [email protected]

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From Introduction to Abandonment: A Detailed Manufacturing Process of Chips!

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