As AI computing power continues to decentralize, intelligent devices at the edge are experiencing explosive growth. From industrial inspection and AR glasses to portable medical devices, an increasing number of application scenarios demand real-time, low-power, and compact AI inference capabilities. In response to this trend, Field Programmable Gate Arrays (FPGAs) are becoming an important computing platform in the edge AI field due to their high parallelism and flexibility.
On June 17, the well-known semiconductor industry live streaming platform “Chip Hero Alliance Live” invited the CEO of E-Link Technology (Shenzhen) Co., Ltd. to share insights on the application trends of FPGAs in vision and AI.
CEO Zhang Guobin of Electronic Innovation Network pointed out that according to market research forecasts, the edge AI chip market is expected to reach $20 billion by 2024 and is projected to exceed $100 billion by 2030. Compared to cloud computing power, edge devices must balance comprehensive indicators such as low power consumption, small size, and flexible configuration. This is precisely the core advantage of FPGAs over general-purpose GPUs and NPUs.
Guo Jing also stated that as AI computing power continues to decentralize, intelligent devices at the edge are experiencing explosive growth. From industrial inspection and AR glasses to portable medical devices, an increasing number of application scenarios demand real-time, low-power, and compact AI inference capabilities. He pointed out that research firms predict that by 2028, the domestic edge AI market will reach 1.9 trillion yuan, with an average annual compound growth rate of 58%. Currently, edge AI is already widely used in smart security and intelligent automotive devices. In the past two years, AI smartphones and AI PCs have become major growth factors, and in the future, edge AI functions will empower more terminal application fields such as healthcare, education, agriculture, and industrial manufacturing.
Compared to cloud computing power, edge devices must balance real-time response, privacy protection, energy efficiency, and cost control, making the balance between performance and resource utilization efficiency of hardware platforms particularly critical. In this context, FPGAs show inherent advantages in edge AI scenarios:
Comparison of FPGA vs. Traditional Computing Platforms in Edge AI Scenarios
| Comparison Dimension | FPGA (e.g., E-Link) | GPU / NPU / MCU (Traditional Platforms) |
|---|---|---|
| Response Latency | Parallel processing architecture, millisecond-level response, extremely low latency | GPU latency exceeds 10ms, MCU processing capability is insufficient |
| Power Consumption Performance | Redundant logic can be turned off, actual power consumption can be as low as 200mW | GPU power consumption can reach several watts, NPU has lower power consumption but lacks flexibility |
| Architecture Flexibility | Supports customized accelerator models and instruction extensions | Fixed architecture, weak adaptability, model replacement requires platform change |
| Module Integration Capability | Can integrate RISC-V cores, DDR controllers, MIPI/PCIe interfaces | Multi-chip collaboration, high system complexity |
| Package Size | Size as small as 5.5×5.5mm, suitable for wearable and embedded systems | Most require independent power supply and heat dissipation, large size |
| Data Privacy | Models deployed locally, no need for cloud processing, enhancing data security | Strong reliance on the cloud, involving transmission and privacy leakage risks |
| Applicable Scenarios | Industrial vision, AR glasses, smart sensing, edge medical, etc. | More suitable for redundant computing environments or large-scale deployment of standard models |
| Cost Performance | Advantages in power consumption, area, and customization efficiency, suitable for low to medium computing power scenarios | High cost, low cost performance at the edge, low resource utilization |
Therefore, FPGAs not only adapt to the diverse and rapidly evolving application needs at the edge but also outperform traditional general-purpose chip architectures in terms of power consumption, latency, and functional scalability, becoming one of the core computing platforms that cannot be ignored in “edge intelligence”.
Most traditional FPGA manufacturers focus on high-end communications and data center markets, making lightweight FPGA solutions for small and medium AI scenarios scarce. E-Link precisely targets this gap, providing ultra-low power consumption, ultra-small size, and high-performance differentiated products, launching multiple series of FPGA products and AI acceleration platforms, quickly gaining favor in markets such as machine vision, security, and industrial automation.
Guo Jing stated that E-Link has launched a complete AI acceleration platform.
Specifically, E-Link has built a three-layer AI platform architecture composed of software and hardware collaboration, which includes:
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AI Training Layer (Upper Layer): Supports mainstream frameworks such as TensorFlow and PyTorch, with models deployed after lightweight processing via TFLite;
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Acceleration Platform Layer (Middle Layer): Provides two RISC-V based AI platforms—
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TinyML: Lightweight, ultra-low power, suitable for small models and resource-constrained scenarios;
2.eCNN: Higher performance, strong scalability, supports parallel operation of multiple CN (compute nodes);
FPGA Chip Layer (Bottom Layer): 40nm and 16nm products cover high and low-end needs.
Typical Platforms and Devices
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TinyML Platform + Ti60 FPGA:
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Size: 5.5×5.5mm;
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Performance: 300MHz, power consumption only 200mW;
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Supports end-to-end processes from video capture to inference;
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Provides accelerator libraries, RISC-V soft cores, and custom instruction support.
eCNN + Ti180 FPGA:
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Supports INT8 precision, theoretical computing power can reach 1.6TOPS;
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Single core uses 35K LUTs, supports dynamic reuse;
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Can parallel integrate up to 8 CN units;
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Online reconfigurable, suitable for complex vision model deployment.
Guo Jing also detailed E-Link’s eCNN acceleration platform, which is a dedicated platform developed based on its innovative Quantum® computing architecture and FPGA (Field Programmable Gate Array) technology, primarily used to accelerate inference tasks of Convolutional Neural Networks (CNNs) and other deep learning algorithms.
The eCNN acceleration platform achieves flexible hardware configuration through eXchangeable Logic and Routing (XLR) units, efficiently processing operations such as convolution, pooling, and activation of CNNs. The platform is designed with a focus on low power consumption, making it particularly suitable for edge computing devices with high power and heat dissipation requirements.
He stated that the eCNN acceleration platform supports RISC-V cores, allowing users to develop applications and algorithms in software and leverage the hardware acceleration capabilities of FPGAs. Users can utilize the custom instruction features of RISC-V for hardware acceleration tailored to specific CNN models. Development tools such as Efinity® GUI simplify the development process from software to hardware acceleration.
Compared to similar devices, this platform has significant advantages in registers, LUTs, and RAM.
This platform is particularly suitable for edge AI applications such as accelerating image classification and object detection tasks, meeting real-time requirements.
He also shared E-Link’s application practices, such as super-resolution and voice recognition, AR glasses, and other applications.
According to him, E-Link FPGAs are now widely used in vision and AI scenarios, with some cases including:
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Super-resolution Image Processing: Running the SRNet model on the TI60, supporting super-resolution outputs from 1.5× to 4×, peak PSNR close to 30dB, frame rate reaching 10fps;
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AR Glasses Object Detection: Grayscale image input, based on a lightweight version of the YOLO model, power consumption only 500mW;
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Portable Ultrasound, Endoscopy, and Other Medical Imaging Analysis: With high integration and low power consumption advantages, E-Link has gained favor in the medical imaging field.
He emphasized that E-Link’s competitiveness lies not only in cost and energy efficiency but also in the originality of architectural design, such as the XLR structure (eXchangeable Logic and Routing units): Lookup tables serve dual functions as routing hubs, significantly improving utilization and performance density; by reducing redundant logic and optimizing metal layer design, structural-level power savings are achieved; integrating RISC-V hard cores, MIPI, DDR3/4 controllers, PCIe, etc., reduces customer system development costs; under the same performance, chip area is reduced by 1/2 to 2/3, making it particularly suitable for space-sensitive applications. In terms of ultra-low power consumption, E-Link’s products can compete with top international devices!
Market Outlook: Edge AI and Vision Processing are FPGA’s Strongholds
Guo Jing stated that from the application trend perspective, industrial vision, security, automotive electronics, and portable medical devices are the most explosive tracks for edge AI. Especially in applications sensitive to power consumption and size, such as thermal imaging, 3D scanning, and LiDAR, E-Link’s product portfolio and flexible AI platform provide optimal solutions. He also added that E-Link’s new 16nm products can offer higher bandwidth and stronger computing power, deeply empowering machine vision system applications.
As the demand for autonomous and controllable programmable devices rises domestically, coupled with the trend of “edge distillation” of large AI models, FPGA suppliers like E-Link, which focus on AI edge scenarios, will welcome broader growth opportunities in the coming years.
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