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Recently, Zhang Fanwu, the Chief Engineer of Intelligent Technology at Dongfeng Motor’s Global Innovation Center, announced that Dongfeng’s automotive-grade high-performance MCU chip DF30 has completed its first tape-out (trial production) verification, and automotive-grade validation will begin shortly, with mass production planned for next year.

The DF30 chip is only the size of a thumbnail, black in color, and is the first fully autonomous high-performance automotive-grade MCU chip in China. It is based on an open-source RISC-V multi-core architecture and developed using domestic 40nm automotive-grade technology, achieving a fully localized closed-loop process from design, manufacturing to packaging and testing, with a functional safety level reaching ASIL-D (the highest safety level for automotive electronics).

The DF30 chip features four major characteristics: “high performance, strong controllability, ultra safety, and extreme reliability,” and has passed 295 rigorous tests, including basic tests, stress tests, and application tests. In terms of applicable scenarios, the DF30 chip is compatible with domestic autonomous AUTOSAR automotive software operating systems, has a complete development environment, and can be widely used in power control, chassis, electronic information, and driving assistance fields, filling a domestic gap in this area.

According to reports, the DF30 chip has a wide range of applications, including use in the engines and chassis of fuel vehicles, as well as in the three-electric systems of new energy vehicles. Its functionality and performance are comparable to similar products internationally. In February of this year, Dongfeng completed cold climate testing of a power controller developed based on the DF30 in Mohe, Heilongjiang, achieving the expected goals, with plans for hot climate testing in Turpan this summer.

A New Model for Chip Manufacturing: Joint R&D

A traditional fuel vehicle requires 300 to 500 chips, and with the advancement of electrification, connectivity, intelligence, and sharing in vehicles, the number of chips in new energy vehicles is currently around 500 to 800, with high-intelligence new energy vehicles expected to exceed 1,000 chips. After achieving Level 5 autonomous driving, the number of chips in vehicles may exceed 1,200. Zhang Fanwu stated that currently, 90% of automotive chips have been localized. For MCU chips, we chose a “hard nut to crack” from the remaining 10%.

In 2022, Dongfeng Motor took the lead in establishing a joint innovation consortium for automotive-grade chip technology in Hubei Province, collaborating with eight enterprises and institutions, including China Information Technology Binary Semiconductor Co., Ltd. The consortium aims to achieve complete autonomy in defining, designing, manufacturing, packaging, and developing controllers for automotive-grade chips, accelerating breakthroughs in innovative results. Dongfeng provides the requirements, while downstream companies are responsible for design, manufacturing, etc., creating a complete chip industry chain.

This joint R&D model is an exploration within the industry and was not initially smooth. During the collaboration, Dongfeng proposed using a key module in the chip, while the design company insisted on using a different module. The first tape-out verification failed because the absence of this key module prevented the development of a basic function for the controller using this chip. “What we are doing is a process from 0 to 1, with no templates to refer to. Everyone has their own ideas, which leads to such collisions,” Zhang Fanwu stated. The tacit understanding has gradually increased through these discussions and confrontations, and now the communication mechanism within the innovation consortium is becoming smoother and more efficient.

Currently, the innovation consortium has received widespread attention in the industry, with member units expanding to 44, covering the entire industry chain of automotive-grade chip standards, design, manufacturing, packaging, and application. The consortium has produced over 50 invention patents and has led the drafting of six national and industry standards for automotive-grade chips. The collaborative innovation results of the consortium have won the gold medal in Hubei Province’s high-value patent competition, and the high-side driver chip developed by them has been officially mass-produced and installed in Dongfeng’s new energy vehicles.

RISC-V Architecture Enters the Automotive MCU Field

Relevant institutions predict that the global automotive-grade chip market will maintain a high growth rate. Omdia has predicted that the global automotive-grade semiconductor market will reach $80.4 billion by 2025, and some studies suggest that the global market size may exceed $100 billion by 2030.

The overall market growth is attributed to the rapid development of new energy vehicles and the continuous improvement of automotive intelligence and connectivity levels, which continuously drive the demand for chips per vehicle. For example, smart electric vehicles require a large number of chips to achieve functions such as autonomous driving, smart cockpits, and battery management, while traditional fuel vehicles are also increasingly applying electronic systems, thereby driving chip demand.

Automotive-grade MCUs play a crucial role in the field of smart vehicles, serving as the core of automotive electronic control units, responsible for coordinating and managing the processing of various information within the vehicle. From powertrains to body control systems, from autonomous driving to smart connectivity, MCUs play a fundamental and critical role.

It is worth noting that a significant change in the current automotive MCU field is the entry of the RISC-V architecture. In addition to Dongfeng’s DF30, Microchip has launched the RISC-V architecture PIC64, Changan Automobile has unveiled the automotive-grade MCU chip Zijing M100, and Guoxin Technology has initiated the design and development of the first high-performance automotive-grade MCU chip CCFC3009PT based on the RISC-V architecture.

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