Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the best and largest pure FPGA engineer community in China SPI Bus SPI (Serial Peripheral Interface) is a high-speed, full-duplex, synchronous, serial communication bus that uses 3 to 4 lines and operates in a master-slave mode, … Read more
Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the best and largest community for pure FPGA engineers in China. The code comments are a bit rushed, please criticize any incorrect comments; it is for reference only. UART The UART is relatively simple, so only … Read more
Reply “Join Group” to join the Semiconductor Industry Alliance WeChat group ASIC is originally a dedicated integrated circuit developed for a specific function. For example, the chip inside a camera is small, has low integration, and low cost, but it is sufficient for its purpose. A counterfeit camera sells for only 30 yuan; how much … Read more
From the development history of ASIC in the era of Bitcoin mining machines, we can see the unique advantages of ASIC in the field of dedicated parallel computing: high computing power, low power consumption, low cost, and strong specialization. The TPU recently exposed by Google, which is dedicated to artificial intelligence deep learning computing, is … Read more
Click the card below to follow Arm Technology Academy This article is authorized to be transferred from the WeChat public account “Electronic Circuit Development Learning”. This article mainly shares content related to JTAG boundary scan. How did I learn about boundary scan? This starts with my purchase of an FPGA board. Recently, I found an … Read more
1. What is a BSDL File? In the last article, we introduced the basics of JTAG boundary scan, today we will look at a file that is essential for boundary scan testing, the BSDL file. BSDL, Boundary Scan Description Language is an abbreviation for Boundary Scan Description Language, a subset of VHDL that conforms to … Read more
While reviewing the resource utilization report of the project, we discovered a special underlying hardwareBSCAN, as shown in 1. Let’s understand its uses and applications. Figure1.The resource report shows the number and usage ofBSCAN. Figure2.Finding the path ofBSCANin the code Figure3.Locating the project call to the underlying module Figure4.Finding the location and interconnections ofFPGAunderlyingBSCAN. Figure5.Finding … Read more
1 ADC Chip Debugging Understanding the function of the ADC chip: the Analog-to-Digital Converter (ADC) converts analog voltage into a digital signal. Connect the voltage line to the ADC’s measurement pin, and the ADC module will detect this voltage and automatically convert it to a number. Reading this number gives us the relationship between the … Read more
Yesterday, a student asked me how to drive the DAC5571. I had a solution written by a teacher on hand, and inspired by it, I wrote a simple module. First, let’s take a look at the DAC5571 manual. It uses SDA and SCL for driving, which is the IIC protocol.The waveforms of SDA and SCL … Read more
Machine Heart Released Author: Zhang Xiaofan On June 5, 2019, the second “Low Power Object Detection System Design Challenge” hosted by the top electronic automation design conference DAC concluded in Las Vegas (Machine Heart reported on the first competition last year). This competition aimed to design high-precision and energy-efficient object detection systems for terminal devices, … Read more