Xilinx FPGA Learning Notes

Xilinx FPGA Learning Notes

Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the best and largest pure FPGA engineer community in China. 1. Timing Design Method 1: Implementing through state machines, controlling the FPGA with Verilog to make it fast when necessary and slow otherwise. Method 2: Running … Read more

User Guide for Embedded Design with MicroBlaze Processor

User Guide for Embedded Design with MicroBlaze Processor

*This guide covers the use of the MicroBlaze processor in embedded design, designs with memory IP cores, and reset and clock topologies in IP integrator. To obtain the full version of the “User Guide for Embedded Design with MicroBlaze Processor,”please scan the QR code at the end of the document to download it. Overview of … Read more

Understanding the JTAG Boundary Scan (BSCAN) Component

Understanding the JTAG Boundary Scan (BSCAN) Component

While reviewing the resource utilization report of the project, we discovered a special underlying hardwareBSCAN, as shown in 1. Let’s understand its uses and applications. Figure1.The resource report shows the number and usage ofBSCAN. Figure2.Finding the path ofBSCANin the code Figure3.Locating the project call to the underlying module Figure4.Finding the location and interconnections ofFPGAunderlyingBSCAN. Figure5.Finding … Read more

Learning About Zynq Architecture

Learning About Zynq Architecture

Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the largest pure FPGA engineer community in China. 1. Introduction Zynq consists of two main parts: a processing system (PS) made up of dual-core ARM Cortex-A9 processors, and programmable logic (PL) equivalent to an FPGA. It … Read more