Introduction: Previously, I introduced the manufacturing and packaging of chips. In this article, we will look at chip design.█ Design Concepts of ChipsAs we all know, chips have extremely complex structures.Taking NVIDIA’s B200 chip as an example, it contains 208 billion transistors in an area the size of a palm. The layout inside is akin … Read more
FPGA (Field Programmable Gate Array) development is a complex process that involves multiple steps and stages. Below is the basic process of FPGA development: Function Definition/Device Selection: Before system design, it is essential to conduct feasibility studies, system design, and selection of FPGA chips. System engineers weigh various aspects such as system specifications, complexity, working … Read more
As chip scales continue to expand and design complexity increases, the development of EDA software has not kept pace. Recent statistics show that the first tape-out success rate for chips has hit a new low of only 14%. Previously, it was 28%, and even earlier it was 30%, showing a decline almost every year. This … Read more
On June 2, Chip Ranking reported that the success rate of chip tape-outs has dropped to a historical low! According to Siemens EDA data,the success rate of first-time chip design tape-outs has fallen to 14%, a significant decrease from 24% two years ago. Eight out of ten companies failed their first tape-out. The reasons stem … Read more
The semiconductor industry is facing unprecedented technical challenges, with the chip tape-out success rate dropping to a historic low! According to data from Siemens, an Electronic Design Automation (EDA) company,the success rate of first-time chip tape-outs has fallen to a historic low of 14%, a significant decrease from 24% two years ago. In other words,eight … Read more
The research team at Carnegie Mellon University in the United States has announced the development of the world’s smallest known electric autonomous miniature bipedal robot, ‘Zippy’. This robot stands less than 4 centimeters tall and, thanks to its compact onboard battery, actuators, and control system, can not only start autonomously but also walk, turn, jump, … Read more
On May 14, according to EEnews Europe, Abhi Kolpekwar, Vice President and General Manager of Siemens EDA’s Design Verification Technology, stated that the first tape-out success rate (referring to chips based on advanced process technology) is currently declining, having dropped from 32% in 2020 and 24% in 2022 to 14% in 2024. “This is a … Read more
Open source is a buzzword. A few years ago, the open-source architecture RISC-V emerged, creating significant waves in the chip design field due to its open characteristics.. Earlier this year, the open-source large model DeepSeek made a grand debut, igniting further interest in AI. Now, this wave has reached the FPGA . 01The World’s First … Read more
May. Click the blue text to follow us 2025.05 About a month ago, we shared an article discussing the sharp decline in the success rate of chip tape-outs. For more details, refer to the article titled “Chips, Historical Low Points”. In response to this issue, Brian Bailey, editor of Semiconductor Engineering, stated that this is … Read more
About a month ago, the Semiconductor Industry Observer WeChat account shared an article discussing the sharp decline in the success rate of first-time chip tape-outs. For more details, refer to the article titled “Chips at a Historical Low”. In response to this issue, Brian Bailey, editor of Semiconductor Engineering, stated that this is just the … Read more