
Author|Yao Jinxin, Xiao Jing
China’s computing chip sector is quietly undergoing changes.
At the 2025 Huawei All-Connect Conference, Huawei released several heavyweight new chips, including the Ascend 950 series, 960, and 970 AI chips, and announced the product roadmap for Ascend AI chips for the next three years.
Among them, the 950 series has two different suffixes—PR (Prefill & Recommendation) and DT (Decoder & Training).
Traditional AI chips face resource contention issues when processing large model inference, and the memory capacity required for recommendation algorithm inference models in internet platform companies is also enormous. Achieving a balance between computing power, memory capacity, and memory bandwidth is key to improving the return on investment.
Huawei’s “P/D separation” design attempts to achieve this goal by configuring different computing power, memory capacity, and bandwidth for different application scenarios.
This design specifically addresses the real challenges faced by the Chinese AI market: being able to run the full version of DeepSeek has almost become a touchstone for evaluating AI computing systems domestically.However, to accommodate 671 billion parameters, the cost difference alone for using different versions of memory can reach tens of thousands of dollars.
It can be said that the market demand of the Chinese AI industry is driving product innovation in domestic chips.
From a product perspective, the biggest highlight of this conference is also a strong industry signal:
Applications and foundational model industries represented by DeepSeek are continuously and deeply promoting the development of Chinese AI chips; furthermore, benefiting from China’s vast data center infrastructure scale and future demand, the ecological pattern of “Huawei-Haiguang-Others” is basically formed;
The era urgently needs a product manager talent pool that has a technical background, is well-versed in market applications, and possesses the ability to balance trade-offs;
The prosperity and leadership of the AI industry are prerequisites for breakthroughs and innovations in AI chips.

01
Production capacity is no longer an issue,
The next step is ecology
From the recent signals actively sent by Huawei, as well as industry information obtained by the author as a long-time practitioner, Huawei’s production capacity constraints have basically been alleviated.
The three pillars of data centers are computing, communication (network interconnection), and storage, which are essential premises for analyzing computing power systems. In AI computing systems, factors affecting computing performance can also be divided into three parts: design computing power value, high-speed interconnection between computing (power) cores, and storage bandwidth.
In “SoftBank Invests $2 Billion, Intel Becomes the Biggest Variable in Global High-End Manufacturing,” I previously mentioned that the size of computing power is closely related to process technology, and this high-end process technology is primarily reflected in the high-end production capacity of fabs and advanced packaging.
Companies providing Huawei with CoWoS-like packaging have already seen surplus production capacity this year and are releasing it externally, indicating that Huawei’s demand has basically been met around the 7nm node.
Now let’s look at high-speed interconnection.
During WAIC, super nodes were the highlight of AI infrastructure. Among them, Huawei’s CloudMatrix384 became a highlight, characterized by its point-to-point, fully interconnected, ultra-high bandwidth network, connecting all NPUs and CPUs through the UB protocol.

CloudMatrix384 achieves complete point-to-point decoupling and pooling of CPU, NPU, memory, NICs, and other resources through Ultra-High-Performance Networking. Its point-to-point hardware architecture includes a super high bandwidth unified bus (UB) for intra-node expansion, RDMA for inter-node communication, and a virtual private cloud (VPC) for integration with data center networks. This once again proves that communication technology is indeed Huawei’s core advantage.

Now let’s look at memory bandwidth.
Huawei has a deep accumulation in the communication field, and it can be said that high-speed interconnection technology is Huawei’s “old business.”
Now let’s look at memory bandwidth.
At this conference, Huawei released the 950, 960, and 970 series products, among which the most eye-catching is the 950 series, which launched two versions. From an application perspective, this marks the decoupling of PD at the hardware level, but the result shows that memory bandwidth has also kept pace.
With significant breakthroughs in computing, high-speed interconnection, and storage bandwidth, Huawei, whose production capacity issues have been resolved, needs to conquer the next fortress, which is the product ecology.
In 2022, when the industry began to notice the significance of the CUDA ecosystem to NVIDIA, building an ecosystem seemed to become a cliché.
The essence of ecology is business.
Intel built the x86 ecosystem, NVIDIA built the CUDA ecosystem, and even Apple, Xiaomi, and Tencent have their own ecosystems. The common point is that every enterprise, institution, and developer within this ecosystem can find their ecological niche, commercialize it, and profit from it.
One cannot expect that when a company raises the ecological banner, many companies will invest resources without seeking returns. No profit, no early risers, is the norm in the business world.
Having business (potential) is the foundation for establishing an ecosystem.
Therefore, traditional Huawei may face (and is undergoing) a transformation from closed to open, from keeping the water for oneself to sharing benefits. The paths taken by Intel and NVIDIA as leaders must also be traversed by Huawei.
Huawei is not alone on this road, as there is also Haiguang.
Geopolitical risks have given rise to opportunities for self-control. As a successful example of technology localization, Haiguang, with the advantages of the x86 architecture, has been invincible in the domestic market and the domestic market. With the accumulation of capital becoming increasingly abundant, its technical strength and product involvement are also increasing day by day. In addition to CPUs, AI computing chips, RAID controllers, and high-speed network chips are also maturing, and Haiguang is gradually making inroads into important chips in data centers.
In late May 2025, Haiguang announced it would merge with Shuguang. Earlier, these two brother companies had already begun to collaborate at the ecological level, repositioning their respective enterprises and achieving cooperation with domestic server manufacturers and other enterprises in the industry chain through market transfer measures to build a system-level ecology.
It can be said that the pattern of “Huawei-Haiguang-Others” is basically formed.
Based on this observation, further deductions can be made:
-
Huawei will soon make a choice between IDM and Fabless models. Of course, regardless of the choice, it should still maintain strong control over production capacity;
-
The next step for the merged Haiguang is to invest in high-end production capacity, which in today’s China likely means that the fab is probably SMIC or Huahong. From a commercial operational perspective, Huahong is more likely. As for OSAT, Tongfu Microelectronics has long had close ties with Haiguang.
02
The Era of Product Managers in China’s Chip Industry Has Arrived
The reason the 950 series released this time has attracted attention is precisely because of its two different models, PR and DT, which represent the long-explored “P/D separation” in the industry.

This is another decoding game similar to the release of DeepSeek.
To clarify this concept, we need to look at the evolution of large models and the actual challenges faced by China’s AI computing power.
The parameter count of large models starts from the billion level, with hundreds of billions and trillions being the norm. These parameters require a very large storage space, and since extremely high-speed access to these memories is needed during computation, high bandwidth is required. This has led to the emergence of HBM, a new type of memory that has both large capacity and high bandwidth.
When performing calculations, the size of computing power also determines the efficiency of the computation, so the target design computing power of an AI chip will also be made as large as possible.
However, very few product managers deeply consider the optimal ratio between computing power and memory bandwidth in their designs. After all, apart from the AI chips customized for large platforms by NVIDIA and Broadcom, being usable is already a remarkable existence.
However, a practical problem is that HBM is extremely expensive, with the cost per GB of HBM being nearly 10 times that of DDR, or even higher. For Chinese AI chip companies, not only is there significant cost pressure, but obtaining sufficient production capacity and even stable supply is also a challenge.
An excellent product manager or architect is considered qualified and excellent because they know how to optimize and make trade-offs. The premise of good optimization and trade-offs is a deep understanding and insight into application scenarios.
In AI application scenarios, the highest resource demands are, apart from the model training process, the well-known large language models and the main profit source for every internet company—the recommendation algorithms.
In large model inference, the following two metrics are commonly used to evaluate performance:
TTFT (Time-To-First-Token)
The time taken to generate the first token, which is the time from when the user finishes inputting to when the large model replies with the first word (token). This mainly measures the performance of the Prefill stage, which is a compute-intensive task that requires high parallel capability but can have relatively lower memory bandwidth requirements;
TPOT (Time-Per-Output-Token)
The time taken to generate each token, which is the response speed directly felt by the user. This mainly measures the performance of the Decode stage, which has higher requirements for memory capacity and memory bandwidth.

When Prefill and Decode run on the same AI chip, due to the differences in computational characteristics between the two stages, resource contention occurs between TTFT and TPOT. If the Prefill stage is prioritized to reduce TTFT, the performance of the Decode stage (TPOT) may decline. If TPOT is chosen to be improved, it will increase the waiting time for Prefill requests, leading to an increase in TTFT.
This time, Huawei’s two models, using different memory capacities and memory bandwidths, should have adopted the PD separation approach to break this contradiction.
Being able to run the full version of DeepSeek has almost become a touchstone for evaluating an AI computing system domestically.
However, to accommodate 671 billion parameters, the cost difference alone for using different versions of HBM can reach tens of thousands of dollars. In internet platform companies, the memory capacity required for their recommendation algorithm inference models is also quite large. If optimization, trade-offs, and balance can be achieved between computing power, memory capacity, and memory bandwidth, the return on investment (ROI) will improve.
The era calls for professional AI chip product managers.
In fact, among domestic chip companies, truly capable product managers are very scarce. In the past, when chips were mainly monopolized by foreign companies, a chip company’s Product Marketing or Product Line Manager was a core management position for the product line, usually held by a very few people at headquarters. As the demand in the Chinese market and the situation in the U.S. have diverged to some extent, Chinese mainland individuals have gradually entered this position.
In the Chinese context, “market manager” is often understood as a role responsible for market communication (Marcom) or market promotion (Business Development). In today’s domestic AI chip companies, R&D positions are still defining products.
From the requirements proposed by the full version of DeepSeek to the localization demand for FP8 data precision, and up to this P/D separation, one can subtly see the trend of model applications driving product definition has already occurred in China. Therefore, it is only natural that a product manager with a technical background, who is also well-versed in market applications and possesses the ability to balance trade-offs, will become the leading force in defining and promoting the development of computing power chips and systems in the next stage.
This trend marks the beginning of specialization and refinement in AI chips and AI systems, and is a sign that product operations have reached a new level.
This trend is a renewed manifestation of the economic law that “demand determines supply” in the Chinese AI market.
03
AI Industry is a Strategic High Ground,
AI Chips and AI Industry Can Promote Each Other
Therefore, we must clearly state:We cannot slow down the development of the AI industry for the sake of developing AI chips.
The prosperity and leadership of the AI industry are prerequisites for breakthroughs and innovations in AI chips.
AGI and controllable nuclear fusionare the two peaks of productivity that humanity currently faces. In the current geopolitical landscape, competition among major powers revolves around these two peaks. Meanwhile, competition among enterprises strives to ensure they remain at the table and not be left behind by the times.
Just like in war, one cannot rely solely on passion and slogans, but use outdated weapons and equipment to seize strategic high ground. We should utilize all available advantageous resources to ensure victory in war.
In the communications industry, in the power industry, and in the major infrastructure industry, it is precisely because of our large market scale and prosperous terminal industries that we have gradually forced upstream technological breakthroughs and product innovations, ultimately achieving breakthroughs in all links of the industry chain.
In the competition of the AI industry,the first priority is to ensure that we stay at the table in competition, and even become the leading players among them.As numerous cases have shown, and as economic laws reveal, as long as we maintain a world-leading level in the AI industry, the trends we lead, the rich scenarios and clear demands we provide, as well as the most important capital, talent, and industry know-how accumulation will ultimately drive breakthroughs in our AI chips and computing power systems; it is just a matter of time.
However, there is a widely circulated saying online: Adults do not make choices; I want them all.
As a super-large-scale economy, China currently possesses the strength to have it all in terms of industry richness, industrial synergy, and capital accumulation.In other words, under market-oriented operations, there is both the foundation and necessity to use world-class computing facilities to reach the top, as well as the resources and willingness to support domestic AI computing power.
The purpose of striving is to gain more space for choice, both for individuals and for the country.
After years of unremitting efforts and various accumulations by compatriots in various fields, we are in an era of industrial transformation and rapid development. This is a blessing for rationalists, an opportunity for those with courage, and a possible path for every ordinary fighter to achieve a comeback.
>End>>> This article is reproduced from “Tencent Technology,” with the original title “Three Key Issues Facing Domestic AI Chips After Huawei’s New Chip Release.”To share cutting-edge information and valuable insights, the Space and Network WeChat public account reprints this article and has edited it.If not reproduced and cited according to regulations, we reserve the right to pursue corresponding responsibilities.Some images are difficult to find the original source, so they are not marked in the text. If your rights are infringed, please contact us immediately.We.HISTORY/Previous Recommendations
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