From November 24 to 25, the 2025 RISC-V Industry Development Conference and RDSA International Forum was held in a hybrid format between Zhuhai and Macau. This event, which gathered top semiconductor experts, renowned corporate executives, and representatives from research institutions worldwide, has become a core window for insights into RISC-V technology trends and industry ecology.
As an innovative company deeply engaged in the field of RISC-V dedicated processors and DSA technology, SuanZhan Technology participated throughout the conference. During the sub-forum on “RISC-V + Chiplet + DSA” technology integration and ecological co-construction, co-hosted by Yuefang Technology and the RDSA Industry Alliance, the founder and CEO, Zeng Yi, delivered a significant speech titled “Empowering Edge AI with RISC-V: A New Paradigm for Automated Agile Development of Domain-Specific Processors,” sharing cutting-edge technological achievements and industry implementation experiences, providing valuable practical insights for the development of edge AI.
As the wave of generative AI sweeps from the cloud to the edge, applications such as health monitoring in smartwatches, real-time data analysis in industrial sensors, and scenario-based interactions in smart homes increasingly rely on local computing power. The innovative path centered on the RISC-V open architecture, integrating DSA (Domain-Specific Architecture) technology, is becoming the key to breaking through the bottlenecks in the development of edge AI.
DSA (Domain-Specific Architecture) is a technical path that addresses the computing power needs of specific application domains (such as edge AI, wireless communication, and industrial control) through customized hardware architectures and instruction sets, finding the optimal balance between “flexibility” and “high energy efficiency.” Unlike general-purpose CPUs that pursue “full-scene adaptation,” it focuses on the core computational needs of vertical domains, achieving a 10-100 times improvement in energy efficiency by “moderately sacrificing generality,” which precisely aligns with the core pain points currently faced by edge AI.
Currently, edge AI encompasses a rich array of scenarios such as voice recognition, image classification, gesture tracking, and low-power MCUs, with significant differences in computing power, power consumption, and latency requirements across different scenarios. For instance, smartwatches require microwatt-level power consumption, while industrial vision requires millisecond-level response. General-purpose processors’ “one-size-fits-all” solutions cannot accommodate such fragmented demands. At the same time, AI models are continuously evolving, with new operators and data types emerging, but the chip design to mass production often takes 18-24 months, making traditional hardware difficult to adapt to dynamically changing algorithmic needs. More critically, edge devices are constrained by size and cost, making it impossible to stack computing power like in the cloud; they must achieve efficient computation under the constraints of “small area and low power.” DSA, through customized computing units, concentrates hardware resources on core computations, perfectly avoiding the “waste of computing power” inherent in general architectures.
The realization of DSA’s value relies on a flexible, open architecture foundation, and RISC-V happens to form a naturally compatible “golden partner” with DSA. RISC-V’s “modular instruction set” allows developers to customize exclusive instructions for DSA without relying on closed architecture licensing, and its “royalty-free” feature also reduces the R&D costs of DSA dedicated processors, making it particularly suitable for small and medium-sized manufacturers entering the edge AI market.After the combination of the two, it can blur the boundaries between CPU and NPU, dynamically deploying computational loads to the hardware modules of the DSA architecture that are more suitable for the actual application scenarios, ultimately achieving a “1+1>2” effect in computing power.
Zeng Yi stated that although DSA is the “optimal solution” for edge AI, the development of traditional DSA dedicated processors faces insurmountable barriers, preventing many companies from “wanting to do but being unable to do.” Demand-side entities, such as AI algorithm companies and device manufacturers, understand the scenarios and algorithms but lack processor design capabilities; supply-side entities, such as chip design companies, understand hardware but do not comprehend the computing power needs of vertical domains, leading to a significant “cognitive gap” between the two sides. Additionally, traditional DSA development requires going through multiple complex stages, including “architecture design → RTL coding → verification → toolchain adaptation,” with the entire process often taking 6-12 months, which cannot keep pace with the rapid iteration rhythm of edge AI. Coupled with the interdependence of performance, power consumption, and area optimization, relying on engineers’ experience for repeated trial and error makes it difficult to find the optimal balance. To address these industry pain points, SuanZhan Technology proposed a new paradigm of “DSA Automated Agile Development,”transforming DSA development from a “manual mode reliant on expert experience” to a “low-threshold, high-efficiency automated process” through its self-developed ArchitStudio platform.
In his speech, Zeng Yi detailed the core weapon supporting DSA automated development—the “2+N” platform strategy, as well as the “Zhiyi” series of integrated solutions for edge AI, making the implementation of DSA technology tangible and perceptible.“2+N” is the core architecture of SuanZhan’s DSA solutions and an important prerequisite for achieving automated development. Here, “2” represents two core foundations: on one hand, a fully silicon-validated full-stack RISC-V CPU basic IP family that covers all scene requirements from low power to high performance, providing a stable and reliable general computing foundation for DSA; on the other hand, the ArchitStudio processor agile development platform, serving as the “automation engine” for DSA development, which achieves one-click generation from “target program” to “dedicated processor” through three core components: Archit Analyzer, Archit Compiler, and Archit Generator. The platform can automatically complete a series of operations such as architecture extraction, instruction set design, RTL generation, and toolchain adaptation, shortening the original 6-12 month development cycle to 1-2 months, significantly lowering the technical threshold. The “N” represents N vertical domain DSA solutions, where SuanZhan custom-develops dedicated processors for edge AI, wireless communication, industrial control, multimedia, and other fields based on the two core foundations, achieving a dual focus on “domain specificity” and “development efficiency.”
In the edge AI scenario, SuanZhan Technology cleverly resolves the contradiction between DSA “customization” and “flexibility” through “pre-silicon + post-silicon” full-cycle reconfigurable design. Pre-silicon reconfiguration is akin to “building with Legos,” where the platform adopts a highly modular design covering 80% of mainstream edge AI scenarios. Developers can add or reduce computing units, such as NPUs, vector processors, Tensor Units, etc., according to actual needs, achieving the optimal balance of performance, power consumption, and area. Post-silicon reconfiguration allows hardware to “adapt to algorithm changes,” with each computing unit supporting software-defined functional adjustments. Even after chips have been mass-produced, they can adapt to new AI models through firmware updates, such as adding new Transformer operators or optimizing low-bit operations, effectively extending the chip’s lifecycle and enhancing return on investment.
As edge AI transitions from “pilot projects” to “scaled implementation,” the “quality” of computing power supply, namely energy efficiency and flexibility, will be more important than the “quantity,” i.e., TOPS. DSA technology is the core driving force behind this “computing power revolution.” Through the “2+N” platform strategy, SuanZhan is transforming DSA development from a “patent of a few experts” into a “tool for many enterprises,” accelerating the implementation process of RISC-V + DSA in edge AI. In the future, SuanZhan will continue to deepen technological innovation and work hand in hand with global ecological partners to make “efficient computing power” for edge AI accessible, injecting continuous core momentum into industrial development.
About SuanZhan Technology
SuanZhan Technology is an innovative high-tech company providing dedicated processor IP and DSA processor agile development platforms, offering RISC-V dedicated processor solutions aimed at DSA for the industry. With advantages in processor cores, EDA processor design platforms, and cross-platform software ecosystem migration solutions, the company has launched various mode-combined IP custom development solutions, covering a wide range of dedicated processor categories from high to low end, applicable in complex chip solutions for AIOT, DSP, 5G networks, automotive electronics, artificial intelligence, and high-performance computing. The team members of SuanZhan Technology come from leading domestic and foreign enterprises, maintaining a spirit of pragmatism, ambition, passion, and respect, dedicated to transforming the design methodology of dedicated processors, building a high frontier for China’s processor technology, and becoming a world-leading provider of processor solutions.