NXP Semiconductors announced on the 13th that it will collaborate with Rimac Technology, a supplier specializing in high-performance control systems, to develop a centralized vehicle architecture for Software-Defined Vehicles (SDV).The solution developed by the two companies is based on NXP’s S32E2 processor, which is part of NXP’s S32 automotive processing platform. The S32E2 is a processor that supports multiple application environments suitable for high-performance deterministic real-time domain and zone control, capable of integrating various control functions within the vehicle.This centralized architecture, introduced to overcome the limitations of traditional Electronic Control Unit (ECU) infrastructure, is characterized by its ability to comprehensively provide complex functions such as vehicle dynamics, charging and energy management, and body electronics, consolidating over 20 ECUs into 3 central control units (CUs).The S32E2 integrates eight Arm® Cortex®-R52 cores running at speeds of up to 1GHz, high-resolution analog-to-digital converters, and up to 64MB of non-volatile memory, offering high performance and safety. It meets ISO 26262 ASIL D requirements and achieves interference-free operation and error correction between multiple applications through a design that includes isolation mechanisms from core to pin. Additionally, it features a hardware security engine capable of secure boot, key management, and security services.Ray Cornyn, NXP’s head of automotive processors, stated: “Existing microcontroller-based systems struggle with integration and independence; the S32E2 will accelerate SDV development by providing a deterministic action environment for real-time applications.”Ana Martincić S Poljarić, Vice President of Rimac Technology, commented: “By consolidating most ECUs into a high-performance domain controller, we can reduce weight, power consumption, and costs, simplifying software integration. Our future collaboration with NXP will play a key role in reducing overall vehicle complexity and enhancing processing performance.”The architecture developed will initially be applied to the Hypercar project and will later expand to various vehicle domains and alternative mobility platforms.