Content Summary
Previously, we released a high-performance logic analyzer with 8 channels and a 500M sampling rate based on the BX71 core board. Many users of the ACZ702 development board also hope we can provide firmware based on the ACZ702 development board. Today, we bring you this high-performance logic analyzer firmware and usage instructions based on the ACZ702 development board.
This article explains the process of creating an 8-channel high-performance logic analyzer. In this manual, by guiding everyone to flash the dedicated firmware we provide, you can upgrade your ACZ702 development board into a high-performance logic analyzer with a sampling capacity of 500M, 8 sampling channels, and a storage depth of 400M per channel.
Preparation Work
Make sure you have installed the Vivado development software on your computer.
Download the logic analyzer resource package we provide for the ACZ702 development board. (The only way to obtain the resource package: Follow our newly opened “XiaoMeiGe Electronics” WeChat official account, and then reply with the keyword “ZYNQ Logic Analyzer”.)
Download the ACZ702_XLA5008_files folder we provide. This folder contains 3 contents. Among them are three folders:
app: The optimized PulseView logic analyzer software running on the computer.
driver: The driver installation tool for the logic analyzer on the computer
firmware: The firmware program for the ACZ702 development board to implement the XLA5008 logic analyzer, including versions 7010 and 7020.
Flashing Steps
Set all the startup dip switches on the ACZ702 development board to the upper position, which is the JTAG startup mode.
Use a USB data cable to connect the computer to the Type-C USB interface of the ACZ702 development board, and set the power switch to the USB power supply side, as shown in the figure below.
In the Vivado hardware manager, JTAG and ZYNQ devices will be detected. Depending on the device model you are using, it may display as xc7z010 or xc7z020.
Select the ZYNQ chip, right-click, and choose the “Add Configuration Memory Device…” option.
In the Search window, enter the Flash model used on the BX71 core board, which is W25Q128, and then select the first result from the search results. Then click OK.
Once added, a prompt will pop up asking if you need to program this configuration memory. Click OK to enter the file selection interface.
In the file selection interface, for the Configuration file option, select the BOOT.bin file of the logic analyzer firmware we provide. In the Zynq FSBL interface, select the FSBL.elf file we provide.
Click OK to start the download.
After flashing, turn off the development board power switch and unplug the USB data cable.
Switch the jumper cap on the left side of the development board for USB Host/Slave to the Slave side.
Insert the dedicated signal conditioning small board for the logic analyzer function.
Set the startup mode of the development board to 0 up, 1 down, to select QSPI mode startup.
Use a DC adapter to plug into the power port of the development board.
Install Driver
Insert the Type-C data cable into the Type-C interface marked with Slave on the upper left corner of the development board. Power on the development board.
In the device manager, you will find a device named XLA5008. This is our logic analyzer device.
Open the zadig.exe software under the driver folder in the materials. The software will automatically discover the XLA5008 device. If it is not set to XLA5008 by default, you can also click the drop-down arrow on the right to find and select it.
Click the Install Driver button directly to start the installation. The driver installation process takes a while, possibly 1-2 minutes.
After the driver installation is complete, in the device manager, under Universal Serial Bus devices, you will see the XLA5008 with the driver installed.
Run the pulseview.exe software in the app to open the logic analyzer host and automatically scan for our XLA5008 logic analyzer.
Click Start to begin capturing waveforms.
Note that capturing waveforms requires using the front-end signal conditioning small board; otherwise, in high-frequency situations, overshoot may cause glitches, affecting protocol analysis.
Friendly Reminder: The front-end signal conditioning small board for the logic analyzer is already available in the store. Connecting the signal conditioning small board will provide a better signal acquisition experience. (Not connecting may easily cause noise interference.)
Next, let’s enjoy the demonstration of the logic analyzer function on the ACZ702 development board.
The only way to obtain the resource package: Follow our newly opened “XiaoMeiGe Electronics” WeChat official account, and then reply with the keyword “ZYNQ Logic Analyzer”.
1. The front-end signal conditioning small board and the matching wiring used in this experiment have been listed on the “XiaoMeiGe FPGA Store”. If needed, you can purchase it in the store. 19.9 with free shipping.
2. This application does not provide the source code.
3. For more products, more applications, and more materials, please follow the “XiaoMeiGe Electronics” WeChat service account. (This is a newly opened account, and we will use this account to provide services in the future. However, the current account has a comment function, and we will continue to update some articles.)
