Image Source: ADI
SerDes, or Serializer/Deserializer, is crucial in the automotive sector where each camera requires at least one serializer and at least 0.25 deserializer. Each display screen also needs one serializer and one deserializer chip. The global market scale in 2023 is approximately $2.5-3 billion. Although the market size is not large, it is growing rapidly, driven by the fierce competition in the domestic automotive industry, where the number and pixel density of cameras are increasing rapidly, along with the number and resolution of displays. In the area of ADAS with over 4 million pixels and 360-degree panoramic cameras, ADI (primarily from the acquisition of Maxim’s product line for $20.9 billion in 2021) completely monopolizes the market. Below 4 million pixels in the 360-degree panoramic market, ADI also holds a complete monopoly, with Texas Instruments having a small share only in the ADAS market. In the display sector, Texas Instruments accounts for about 70% of the market, while ADI’s share is very low. Sony’s GVIF is also used primarily in Japanese cars, which lag far behind globally, especially in China, resulting in a very low market share for Sony GVIF. Inova’s APIX3 has almost only BMW as a customer, and Valens has almost only Mercedes as a customer.
SerDes is not only widely used in the automotive field but also in robotics, medical, and video acquisition fields, and it is also extensively used in servers, where the value is even higher, with chip prices reaching thousands to tens of thousands of dollars, primarily monopolized by Broadcom.
Signal transmission can be categorized into parallel and serial types. In high-speed conditions, there is crosstalk between several data lines in a parallel port, while a parallel port requires signals to be sent and received simultaneously; any delay in one data line can cause issues. In contrast, serial only uses one data line, eliminating crosstalk between signal lines, and also can utilize low-voltage differential signaling, significantly improving its resistance to interference, thus allowing for higher transmission rates. Despite parallel transmission allowing multiple data bits to be sent at once, the clock frequency is far lower than that of serial transmission. Additionally, the transmission medium for serial is usually coaxial cable, with connectors being FARKA, while the transmission medium and connectors for parallel are more expensive than those for serial, making serial transmission the preferred choice for high-speed transmission.
Before transmission, the data format is reshaped into serial, and after reception, it is converted back to parallel—this is the essence of SerDes. It consists of two chips: the sending end called Serializer and the receiving end called Deserializer. SerDes does not transmit clock signals, which is also its most unique feature. At the receiving end, SerDes integrates a CDR (Clock Data Recovery) circuit, which extracts the clock from the edge information of the data and finds the optimal sampling position. This is also the most challenging aspect, as it transmits digital signals but requires analog technology.
CDR, or Clock Data Recovery, for high-speed serial buses generally embeds clock information into the transmitted data stream through data encoding, and then at the receiving end, the clock information is extracted through clock recovery and used to sample the data. Therefore, the clock recovery circuit is crucial for the transmission and reception of high-speed serial signals. The main design challenge for CDR interfaces is jitter, which is the offset of the actual data transmission position relative to the expected position. Total jitter (TJ) consists of deterministic jitter and random jitter. Most jitter is deterministic, including components such as inter-symbol interference, crosstalk, duty cycle distortion, and periodic jitter (e.g., interference from switching power supplies). Random jitter is typically a byproduct of semiconductor heating issues and is difficult to predict. Transmitting reference clocks, PLLs, serializers, and high-speed output buffers can all affect transmission jitter. Generally, the tolerance for low-frequency jitter is high, as PLL circuits can track well, and the recovered clock jitters together with the measured signal. High-frequency jitter is more problematic; the PLL circuit needs to be set up to filter it out, and setting it up without computer assistance relies entirely on experience—one cannot do it well without around ten years of experience.
This also creates a very wide moat for interface ICs, allowing very small manufacturers to exist; they may only have one product but possess exceptional vitality. A typical example is Inova, which has almost only BMW as a customer, and Valens, which has almost only Mercedes as a customer.
In the camera sector, GMSL dominates the high pixel domain; GMSL (Gigabit Multi-Media Serial Link) is ADI’s serialization/deserialization technology.
ADI, or Maxim’s GMSL technology, first appeared in 1999, with the first product launched in 2004. The third generation of GMSL has now been developed, and GMSL3X is currently under development, which can be considered as the 3.5 generation of GMSL.
Comparison of GMSL Generations
The first generation of GMSL has two versions, based on the advanced version of the first generation.
Currently, the market mainly features GMSL2, while GMSL3 can support up to 15 million pixels. Essentially, the datasheets for GMSL2/3 products require signing an NDA, making it very difficult for outsiders to obtain related information. GMSL4 seems to aim to compete with traditional PCIe/USB, stepping out of the automotive field.
GMSL needs to support the use of coaxial cables and twisted pairs; the high-frequency attenuation of low-cost twisted pair cables is a serious issue. High-frequency attenuation can cause significant inter-symbol interference (ISI) in the received signals, making it difficult to recover the clock and data, leading to an increased bit error rate (BER). The transmitter and receiver adopt a certain form of line equalization to significantly reduce ISI and recover severely degraded data, ensuring reliable operation.
What truly affects the reliable transmission of signals is not the attenuation itself but the variation of channel attenuation with frequency. The difference in attenuation between high and low-frequency signals ultimately leads to inter-symbol interference (ISI). Literally, inter-symbol interference means different code elements interfere with each other; for example, the “1” signal transmitted at time A overlaps with the “0” signal transmitted at time B, causing the signal amplitude at time B to change from 0 to 0.2. Why does the difference in attenuation between high and low-frequency signals lead to inter-symbol interference? Because the loss of high-frequency components in the signal slows down the signal edges, leading to signal broadening. The broadened signal may span multiple unit time intervals (1 UI), leading to the aforementioned overlap of the signal at time A onto time B. The greater the channel attenuation, the more severe the signal broadening, and the larger the proportion of the signal overlapping onto other time signals. In other words, the real issue that the SerDes system needs to address is not the attenuation of the signal but the difference in attenuation between high and low-frequency signals. The solution mainly relies on weighting and equalization, which depends entirely on rich experience accumulation. Only Texas Instruments and ADI can achieve this globally; Broadcom might also be capable but seems uninterested in the automotive sector, with servers’ SerDes being more profitable.
The first generation of GMSL has fixed equalization, the second generation features adaptive equalization (AEQ), and the third generation includes feed-forward equalization (FFE). The adaptive equalizer allows GMSL2 links to resist noise, crosstalk, and reflections. The equalizer amplifies high-frequency signals, and when combined with the frequency response of the cable, the receiver can recover a broadband signal with higher fidelity. The equalizer has 12 different compensation levels, and the chip automatically detects the quality of the input signal, adaptively setting the best equalization value, allowing the SerDes system to handle coaxial cable lengths of up to 30m and STP cable lengths of 15m. Each time the deserializer powers up, it performs an adaptive compensation, calling at approximately 1Hz to track temperature and voltage changes. Therefore, even when the harness shows aging, temperature drift, or individual differences, AEQ can automatically select the best compensation level. Additionally, technicians can read the compensation values of AEQ after powering up; if they are significantly higher than normal, it can indicate potential short circuits, looseness, or bending in the current transmission channel.
Pre-emphasis is a signal processing method that compensates for high-frequency components of the input signal at the sending end. As the signal rate increases, the signal suffers significant degradation during transmission. To obtain a better signal waveform at the receiving end, it is necessary to compensate for the degraded signal. The idea of pre-emphasis is to enhance the high-frequency components of the signal at the beginning of the transmission line to compensate for the excessive attenuation of high-frequency components during transmission.
The GMSL2 link includes an echo cancellation circuit in both the serializer and deserializer to achieve simultaneous transmission of high-speed video data and bidirectional control data. This technology is also used in automotive Ethernet, with the same principle, both aiming to achieve bidirectional data transmission over a single channel.
Currently, in terms of serializers, the main ones are MAX9295 and MAX96717. In terms of deserializers, in the 360-degree surround view sector, MAX96712 can correspond to four 4 million pixel cameras, making it the most mainstream product. Four 2 million pixel cameras are mainly MAX96722/MAX96724/MAX96716F. The GMSL3 generation products currently mainly include MAX96792/MAX96793, which can correspond to four 8 million pixel cameras, with a rate of up to 12Gbps. Currently, Texas Instruments’ highest is DS90UB9702, with a line rate of 7.55Gbps and a maximum rate of 10Gbps.
The SerDes for transferring data from the ECU to the display panel in the cabin is primarily monopolized by Texas Instruments, specifically the FPD-LINK. FPD-Link is a communication standard based on the LVDS physical layer, and its full name is Flat Panel Display Link, proposed by the National Semiconductor Corporation in 1996. The first generation of FPD-Link chipset serializes a wide parallel RGB bus into 4 or 5 pairs of LVDS signals. Currently, the latest is the fourth generation, FPD-LINK IV.
In the display panel sector, unlike cameras, most cameras use MIPI CSI-2, while the main image output interfaces include DP/eDP, MIPI DSI, OLDI, and HDMI. DP/eDP is the future development direction, supporting 8K displays. The mainstream panel interface is still LVDS, with a few high-resolution panels using DP. LVDS was developed by the National Semiconductor Corporation to overcome the drawbacks of transmitting broadband high bit-rate data via TTL levels, such as high power consumption and significant electromagnetic interference. In 2011, Texas Instruments acquired National Semiconductor for $6.5 billion, which is why Texas Instruments holds a dominant position in the automotive display panel SerDes sector. ADI is also making strides in the display panel sector, challenging Texas Instruments’ dominance. ADI’s product line is also broad enough.
In China, there is a preference for multi-screen setups, and deserialization can easily achieve one machine with four screens.
Asymmetric splitting can also be achieved.
Image Source: ADI
It is also possible to display two screens simultaneously.
Image Source: ADI
Texas Instruments has the most advanced technology in this field, with SuperFrame technology, namely DS90Ux941. With up to 5 to 7 screens in the vehicle, using multiple application processors (AP) to drive multiple displays or develop an AP that can drive multiple displays would incur high costs. With the capabilities of the DS90Ux941AS-Q1, a more economical IVI system design can be achieved, requiring only one AP to transmit content to two symmetric or asymmetric displays. In these systems, the AP receives two video frames and combines them into one super frame, and the DS90Ux941AS-Q1 can separate the super frame and forward the generated frames to compatible FPD-Link III deserializers and connected displays.
If two screens are not enough, three screens can be achieved with DS90UH983.
Image Source: Texas Instruments
One video stream is in super frame format, and the other is in regular format. After passing through the DS90UH983, three videos can be separated, plus deserialization corresponding to three screens.
From the SoC in the cabin to the display panel domain, the position of SerDes is very stable. In the camera sector, SerDes faces competition from automotive Ethernet, but currently, the physical layer costs of automotive Ethernet are too high, especially for gigabit or 10-gigabit, and cabin chips rarely support 10-gigabit Ethernet. In the high pixel domain, automotive Ethernet has no advantage, and in the low-resolution domain, the advantage is also not obvious; SerDes will still prevail in the next 5-8 years.
Disclaimer: The views and data in this article are for reference only and may differ from actual situations. This article does not constitute investment advice; all views and data in the article only represent the author’s position and do not provide any guidance, investment, or decision-making opinions.
Related Report:“2023 Automotive Cabin SoC Research Report”
