Fundamentals of Semiconductors: Continuation on MOSFET Threshold Voltage

Continuing from the previous article on MOSFETs, this one will still take the enhanced NMOS as an example.

We know that NMOS operates in several regions: cutoff region, linear region, saturation region, and breakdown region. The operating current of the MOSFET is related to the threshold voltage V_th. So, what parameters are related to the threshold voltage V_th? Refer to the following formula.

Flat Band Voltage V_fb: The gate voltage required to offset the work function difference between the metal (or polysilicon) gate and the semiconductor substrate, as well as the influence of fixed charges in the oxide layer, is the “baseline” for V_th. Formula: V_FB = Φ_ms – (Q_ox / C_ox). This includes two parts: the first part is the metal-semiconductor work function difference Q_ms, which is determined by the inherent properties of the gate material (such as N+ polysilicon, P+ polysilicon, or metal) and the substrate material (P-type or N-type silicon). This is one of the main determinants of V_th. The second part is the influence of fixed charges in the oxide layer (Q_ox), which are positive charges generated during the manufacturing process of the SiO₂ oxide layer. These positive charges help attract electrons, thus reducing the V_th of the NMOS (making it easier to turn on).

Fermi Potential: The surface potential energy required to achieve strong inversion at the surface. Here, φ_F is the Fermi potential of the substrate, which is related to the substrate doping concentration (N_a).

Substrate Doping Concentration N_a: For NMOS, this refers to the doping concentration of the P substrate.

Unit Area Oxide Capacitance C_ox: This is proportional to the dielectric constant of the oxide layer and inversely proportional to the thickness of the oxide layer.

Oxide Layer Dielectric Constant ε_ox: To increase C_ox, high-k dielectrics can be used, such as hafnium oxide HfO₂, which has a k value about 6 times that of SiO₂.

Oxide Layer Thickness T_ox: As the size of the MOSFET shrinks, T_ox also needs to shrink proportionally to maintain the gate’s control over the channel. However, if the oxide layer T_ox is too thin, quantum tunneling effects can easily occur, leading to significant gate leakage current and a sharp increase in power consumption. According to the formula C_ox = ε_ox / T_ox, to achieve the same unit area capacitance, for high-k dielectrics, a thicker physical layer can be used (T_ox can be larger), and a thicker physical layer can effectively suppress quantum tunneling, significantly reducing gate leakage current while maintaining the device’s drive capability.