TinyFPGA-Bootloader: An open-source USB bootloader solution for FPGAs

In FPGA design, a common yet somewhat cumbersome step is how to conveniently load new bitstreams onto the FPGA. This is especially true when there are no dedicated USB-JTAG/programming chips or in low-cost boards, where traditional programming methods may require additional hardware or more complex processes.

The TinyFPGA-Bootloader project aims to address this pain point—it is an open-source USB bootloader (bootloader) IP that can be implemented directly in the programmable logic of the FPGA, allowing bitstreams to be uploaded to SPI Flash in the form of a USB virtual serial port.

Project Overview

Name: TinyFPGA-Bootloader

Open-source repository: GitHub (maintained by the TinyFPGA organization)

https://github.com/tinyfpga/TinyFPGA-Bootloader

License: Apache-2.0

Functionality: Commands from the host side are sent to the bootloader inside the FPGA via USB virtual serial port (USB CDC), which then bridges to SPI Flash to complete FPGA configuration or user image loading.

Example hardware requirements:

• The FPGA board must have USB_P, USB_N 3.3 V signals.

• The board must have an oscillator + PLL that generates a stable 48 MHz clock.

• The FPGA configuration must come from external SPI Flash.

• The USB_P signal should connect to a pull-up resistor (1.5 kΩ) and is recommended to be controlled by the usb_pu signal.

• It is recommended to support a multi-image boot (bootloader + user image) structure.

Core Features

● No additional USB to SPI chip required

Since the bootloader is fully implemented in the FPGA’s internal logic, the board can eliminate the need for a dedicated USB programming chip, thereby reducing costs and simplifying hardware design.

● Programming using familiar serial methods

The host recognizes the FPGA as a “virtual serial device,” allowing users to trigger bootloader functions with simple commands, lowering the entry barrier.

● Supports user image + bootloader image partitioning

This design supports a multi-image structure: the bootloader is located in a dedicated area of the SPI Flash, while user configurations are in another image area. After booting, the bootloader can jump to the user image or execute an update mechanism.

● Board metadata storage mechanism

The security register page of the SPI Flash can be used to store metadata such as board name, FPGA model, hardware version, serial number, address mapping, etc., facilitating generic software recognition of the board and automatic programming execution. The metadata is stored in JSON format, which is clear and readable.

● SPI Flash programming protocol is open

The bootloader supports executing any SPI Flash access operations (write, read, erase, etc.) via the “Access SPI” command on the USB virtual serial port. Designers can refer to the complete protocol description in the README document.

Examples

This project includes examples for several development boards, primarily focusing on the self-made Tiny series development boards:

There are also examples for the Xilinx A7 series entry-level development boards:

After opening, you can view the relevant DEMO:

Note: Vivado version 2017

Applicable Scenarios

Low-cost FPGA boards: Those looking to reduce external programming chips and simplify USB interface design.

FPGA education / prototype development: Quickly downloading new images to the board is particularly convenient in laboratory or educational environments.

Programmable systems / multi-image solutions: Supports bootloader + user image structure, suitable for scenarios requiring remote updates or EEPROM-style mechanisms.

Hardware developers looking to streamline processes: Simplifying the programming process to “plug USB → virtual serial port → download image” enhances engineering efficiency.

Usage Recommendations & Precautions

Before use, please ensure that the board’s USB_P/N signal design is correct, pull-up resistors are connected, and that the “usb_pu” control is supported.

It is essential to ensure that the FPGA clock system can generate an accurate and stable 48 MHz for the USB stack; otherwise, it may lead to unreliable USB connections.

When designing the SPI Flash capacity, it is recommended to consider a “multi-image + user data” structure, leaving enough space.

Although the bootloader is powerful, security mechanisms (such as encrypted images, image signatures, and protected areas) must be implemented by the user.

If you need to integrate this bootloader into a large FPGA/SoC project, please evaluate the board’s resource usage, logical interference, and timing impacts.

Conclusion

TinyFPGA-Bootloader is a very practical, engineer-friendly, and open-source reliable solution, suitable for quickly implementing USB bootloading functionality in FPGA board designs. It not only reduces hardware complexity but also significantly simplifies the image downloading, updating, and board onboarding processes. This is an excellent choice for education, prototype development, and small batch production of boards.

Note the download time for large bitstreams~

Repository Address

https://github.com/tinyfpga/TinyFPGA-Bootloader