ARM has introduced a new strategy!
Following the Cortex-A35, which is positioned for low-power, low-end smartphones, wearables, and the Internet of Things (IoT), ARM has launched a new CPU core named “Cortex-A32”. This core has lower power consumption and improved energy efficiency, primarily targeting the embedded and IoT markets.
The A35 utilizes the ARMv8-A 64-bit architecture, while A32 returns to the ARMv7-A 32-bit architecture, but it has redesigned the instruction prefetch unit to enhance efficiency, featuring high-performance level 1 and level 2 cache systems, which improve floating-point and DSP operation performance, and supports new power management features. A32 is the only 32-bit architecture in ARM’s new generation architecture, resembling a 32-bit version of A35, with a clear goal of further controlling power consumption based on the already impressive A35, thus its application target is very clear.
The A35 mainly replaces the existing 32-bit older architectures Cortex-A5/A7, with official claims of energy efficiency improvements of up to 25%, 30%, and 10% over A7, A5, and A35 respectively, while being more power-efficient at the same performance level, especially showing a performance increase of at least around 40% (integer/floating-point/media) compared to A5, and up to 12.3 times (encryption and streaming). Although it does not support the 64-bit instruction set, the biggest advantage of removing it is the savings in core area and power consumption, significantly reducing costs.
It supports single-core, dual-core, and quad-core configurations, depending on customer needs, and can be combined with other architectures to form big.LITTLE configurations. In the minimum configuration with a single core and 8KB level 1 cache, the area does not exceed 0.25 square millimeters.
The A32 can be manufactured using 40nm, 28nm processes, and the official claims that at 28nm process and 100MHz frequency, the power consumption is only 4mW, which is 0.004W, while in a quad-core, 1GHz frequency full state with various modules, the power consumption per core will not exceed 75mW.
In terms of technology, it supports TrustZone security encryption, NEON SIMD instruction set, DSP/SIMD extensions, VFPv4 floating-point computation, and hardware virtualization.