The Institute of Computing Technology and the Institute of Software of the Chinese Academy of Sciences recently jointly released the world’s first fully automated design system for processor chips based on artificial intelligence technology, named ‘Enlightenment’. It is reported that based on AI technology, this system achieves the first fully automated design process from chip hardware to basic software, with output solutions that meet human expert levels in key indicators such as performance and energy efficiency.
The ‘Enlightenment’ system is expected to change the design paradigm of processor chip hardware and software, significantly improving design efficiency and shortening design cycles, while also enabling rapid customization to meet the diverse needs of chip design for specific application scenarios.
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Fully Automated Design of Processor Chip Hardware and Software
As is well known, chip design is a highly challenging task that requires a significant amount of manpower and resources. Traditional design processes require top expert teams to spend months or even years overcoming challenges, involving multiple key steps, including logic design, circuit design, and physical design in hardware; and operating system kernel design, compiler toolchain design, and high-performance library design in basic software.
Currently, the demand for adapting basic software for chips is surging. Technologies such as AI, cloud computing, and edge computing are driving the diversification of dedicated processor designs, with instruction set combinations growing exponentially, each requiring adaptation to a large basic software stack.
Under the traditional design paradigm, the software ecosystem adaptation cycle is long and costly, severely restricting the release of hardware computing power. To reduce the manpower and resource investment in chip hardware and software design and meet the increasingly diverse needs of chip design, researchers have built the world’s first fully automated processor chip hardware and software design system based on AI technology, named ‘Enlightenment’.
Based on the ‘Enlightenment’ system, all aspects of chip hardware and software design can be fully automated, with design results comparable to or even exceeding those of human expert designs.
Figure 1: Physical image of Enlightenment 1, performance comparison between Enlightenment 1 and Enlightenment 2
In terms of front-end chip design, it has achieved the world’s first fully automated design of a processor core, ‘Enlightenment 1’, completing all front-end designs of a 32-bit RISC-V CPU within 5 hours, reaching the performance level of Intel 486, with a scale exceeding 4,000,000 logic gates, and has completed tape-out.
Its upgraded version, ‘Enlightenment 2’, is the world’s first fully automated design of a superscalar processor core, reaching the performance level of ARM Cortex A53, with a scale expanded to 17,000,000 logic gates.
In terms of automatic hardware code generation, it has implemented the CodeV series, a large model for automatic hardware code generation, capable of simultaneously completing code generation and code snippet completion in Chisel and Verilog languages. Among them, CodeV-R1 has achieved the best international level in Verilog hardware code generation, surpassing the 671B full version of DeepSeek-R1 in the RTLLM Benchmark.
In terms of automatic operating system configuration optimization, it has achieved the world’s first automatic optimization method for operating system kernel configuration based on large models, AutoOS, which can automatically generate customized optimized operating system kernel configurations, with performance improvements of up to 25.6% compared to manual optimizations by industry experts.
In terms of automatic compiler toolchain design, it has achieved the world’s first automatic cross-platform tensor program translation tool, QiMeng-Xpiler, which can automatically translate programs between different processor chips such as NVIDIA GPUs, Cambricon MLUs, AMD MI accelerators, Intel DL Boost, and different programming models such as SIMT and SIMD, achieving performance up to twice that of manually optimized operator libraries by vendors.
At the same time, it has achieved the world’s first end-to-end compiler based on large models, successfully completing 91% of compilation tasks in the real compilation dataset ExeBench.
In terms of automatic high-performance library design, it has proposed the world’s first high-performance matrix multiplication code automatic generation framework based on large models, QiMeng-GEMM, and the world’s first high-performance tensor operator instruction-level automatic generation framework based on large models, QiMeng-TensorOp, achieving maximum performance of 211% and 251% of OpenBLAS on RISC-V CPUs, and maximum performance of 115% and 124% of cuBLAS on NVIDIA GPUs, respectively.
Three Levels: Large Models, Intelligent Agents, and Applications
Automatic circuit logic design has long been one of the core problems in computer science. Existing automatic design methods typically use AI technology as a tool to optimize a specific step in chip design.
Unlike traditional automatic design methods, the ‘Enlightenment’ system aims to achieve end-to-end fully automated design and adaptation optimization from functional requirements to processor chip hardware and software.
However, due to the uniqueness of the processor chip design field, achieving fully automated design of processor chip hardware and software mainly faces key challenges such as data scarcity, correctness, and solving scale.
To address these challenges and establish a new paradigm for fully automated design of processor chip hardware and software, ‘Enlightenment’ consists of three levels:
The bottom layer is the large model in the processor chip field;
The middle layer constructs intelligent agents for chips and software, achieving automatic design of processor chips and basic software;
The top layer applies to all steps of chip hardware and software design.
Figure 2: Structure diagram of the ‘Enlightenment’ system, including three levels
The large model for processor chips needs to fully integrate domain characteristics, master domain knowledge of processor chip design, and possess basic capabilities in hardware and software design.
In addition, it utilizes a feedback-based inference process for the large model of processor chips, including correctness feedback and performance feedback. Through automatic functional verification and automatic repair based on functional correctness feedback, it ensures the correctness of the generated results. At the same time, through automatic performance evaluation and automatic search based on performance feedback, it effectively prunes the solution space to achieve efficient search for high-performance design results.
Figure 3: Feedback-based inference in the ‘Enlightenment’ system, including correctness feedback and performance feedback
Based on the large model for processor chips, to automatically design the hardware and software of processor chips, the ‘Enlightenment’ system has constructed intelligent agents for chip generation and basic software.
Combining feedback-based inference capabilities, the chip generation intelligent agent automatically completes the design from functional requirements to logic circuits, while the basic software intelligent agent autonomously completes the automatic functional adaptation and performance optimization of the given basic software for the target chip.
Based on the chip generation intelligent agent and the basic software intelligent agent, all steps of processor chip hardware and software design are fully automated for diverse practical application scenarios.
Establishment and Outlook of ‘Enlightenment’
Driven by various applications at the top level, after achieving automatic design methods for all steps of chip hardware and software, it can not only provide rich data in the field of hardware and software design for the large model of processor chips but also provide process design experience for the intelligent agent of processor chips to interact collaboratively with professional tools.
Therefore, the ‘Enlightenment’ system adopts a “three-step” technical route:
1. Top-down: Using a general large language model as the starting point for the large model of processor chips, achieving the intelligent agent for processor chips and completing the automatic design of all steps of processor chip hardware and software. By linking all steps, it automatically generates rich cross-layer collaborative design data for training the large model of processor chips.
2. Bottom-up: Based on the trained large model of processor chips, reconstructing intelligent agents and applying them to all steps of hardware and software design to enhance automatic design effectiveness.
3. Self-evolution: Composing the top-down and bottom-up design processes into an iterative cycle, achieving self-evolution of the system, continuously enhancing the capability of fully automated design of processor chip hardware and software.
Currently, researchers have basically completed the automatic design of all steps in the first phase and have linked them into a complete hardware-software collaborative design process driven by 3D Gaussian splashing. They will continue to promote the establishment of cross-layer collaborative design datasets and the training of the large model of processor chips.
In the future, researchers will also explore the intersection of different AI paths such as symbolic, behavioral, and connectionist approaches to continuously enhance the fully automated design capability of the ‘Enlightenment’ system for processor chips, while continuously expanding the application boundaries of ‘Enlightenment’ to provide intelligent support for a wider range of processor chip design application scenarios.
Source | New Intelligence, China Electronics News
New Media Editor | Wang Hangfei
First Review | Chen Dan
Second Review | Wang Hui
Third Review | Chai Qiongying
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