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AMD Adaptive Computing documentation is organized according to a set of standard design processes to help you find content relevant to your current development tasks. You can access the AMD Versal™ Adaptive SoC design process on the design center page. You can also use the design process assistant to gain deeper insights into the design process and find content specific to your intended design requirements.This document covers the following design processes:
Embedded Software Development:Creating a software platform based on the hardware platform and developing application code using embedded CPUs. It also covers XRT and compute graph APIs. Topics relevant to this design process in this document include:
Chapter 2: Using the MicroBlaze V Processor in Embedded Design
Hardware, IP, and Platform Development:Creating PL IP blocks for the hardware platform, creating PL cores, functional simulation, and evaluating AMD Vivado™ timing closure, resource utilization, and power closure. It also involves developing hardware platforms for system integration. Topics relevant to this design process in this document include:
Chapter 3: Design with Memory IP Cores
Chapter 4: Reset and Clock Topology in IP Integrator
Device Tool Flow Overview
The AMD Vivado™ tool provides a specific programming flow based on the processor.The Vivado IDE uses IP integrator with a graphical connection screen to specify devices, select peripherals, and configure hardware settings.
You can use IP integrator to capture hardware platform information and export application files in XML format, along with other data files for developing designs for AMD processors.Various software design tools use XML to perform the following tasks.
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Create and configure board support package (BSP) libraries
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Infer compiler options
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Program the processor logic (PL)
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Define JTAG settings
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Automatically perform other operations requiring information about the hardware
The AMD MicroBlaze™ V embedded processor is a Reduced Instruction Set Computer (RISC) core optimized for implementation in AMD Field Programmable Gate Arrays (FPGAs) and Adaptive SoCs.This core is based on the RISC-V open instruction set architecture.
To create an embedded MicroBlaze V processor design, refer to Chapter 2: Using the MicroBlaze V Processor in Embedded Design for information on how to use IP integrator and other AMD tools. For more information about the processor, refer to the “MicroBlaze V Processor Reference Guide” (UG1629).
AMD provides design tools for developing and debugging software applications for AMD processors, including but not limited to:
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Software IDE
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GNU-based compiler toolchain
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Debugging tools
These tools support you in developing bare-metal applications without an operating system and applications for the open-source Linux operating system.
AMD provides integrated hardware design and software development, supporting the integration process down to the AMD Vitis™ software platform.Vitis is a standalone product available for download from the AMD website. For more information on how to use this tool, refer to the “Vitis Unified Software Platform Documentation”.
Note:The MicroBlaze V requires the use of Vitis Unified IDE.
Using the MicroBlaze V Processor in Embedded Design
The AMD Vivado™ IDE IP integrator is a powerful tool that supports you in stitching together processor-based systems.
The MicroBlaze V embedded processor is optimized for implementation in AMD Field Programmable Gate Arrays (FPGAs) and is a Reduced Instruction Set Computer (RISC).
The following diagram shows the functional block diagram of the MicroBlaze V core.
The MicroBlaze V processor is highly configurable.You can select a specific set of features according to your design requirements.The fixed processor feature set includes:
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32 general-purpose registers of 32 or 64 bits
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32-bit instruction word
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32-bit address bus, expandable to 64 bits
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Single-issue pipeline
In addition to these fixed features,the MicroBlaze V processor also includes parameterized values that support selectively enabling additional features.
For more information, refer to the “MicroBlaze V Processor Reference Guide” (UG1629).
According to user requirements, the MicroBlaze V can be implemented as a 32-bit or 64-bit processor.In general, unless specific requirements cannot be met, AMD recommends choosing the 32-bit processor implementation.The 64-bit processor extends the general-purpose registers to 64 bits, provides instructions for handling 64-bit data, and can transparently address instructions and data using up to 64-bit addresses.
Also refer to the “Triple Modular Redundancy (TMR) LogiCORE IP Product Guide” (PG268), which provides soft core error detection, correction, and recovery for AMD devices. This guide describes the IP cores included in this solution and explains various typical use cases.
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