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In recent years, with the rapid development of intelligent connected vehicle technology, onboard computing chips have become the core of intelligent driving systems. TraditionalMCU (Microcontroller Unit) chips have struggled to meet the demands of autonomous driving for heterogeneous data with high throughput and low latency.
As a result, SoC (System on Chip) has gradually replaced MCUs as the core hardware platform of the new era, becoming the main force in intelligent vehicle computing.
This type of chip integrates various functional modules such as CPU, GPU, NPU, ISP, and communication modules, enabling it to process image and sensor data while supporting complex artificial intelligence inference algorithms, making it the “brain” of modern autonomous driving systems.
Comparison of internal structures between MCU and SoC
The role of SoC chips in intelligent driving is indispensable
They are typically integrated into perception modules such as cameras, LiDAR, and millimeter-wave radar, or centrally deployed in domain controllers to fuse information from multiple sensors and ultimately make driving decisions.
In high-level advanced driver assistance systems above L2, the real-time performance, computing density, and energy efficiency of SoC chips directly determine the upper limit of system performance. Therefore, whether it is an economical model focusing on cost-performance ratio or a high-end model pursuing ultimate experience, SoC is the technical cornerstone for building intelligent driving capabilities.
*Intelligent drivingSoC has undergone deep architectural innovations.
From the early combination of CPU + GPU to the currently widely adopted heterogeneous architecture model of CPU + GPU + ASIC or CPU + NPU, various hardware units are divided according to demand.
CPU is used for general control logic and task scheduling, GPU is responsible for accelerating images and deep learning models, while NPU or ASIC is optimized for specific neural network structures such as CNN and Transformer.
This “modular + customized” hardware architecture allows SoC to meet high-performance computing needs while also having energy control advantages. In recent years, more and more companies have begun to pay attention to the introduction of FPGA programmable chips to adapt to the rapid iteration of algorithms.
With the rise of perception algorithms such as BEV (Bird’s Eye View), OCC (Occupancy Network), and Transformer, traditional SoC architectures are also being forced to innovate. Large models represented by Transformer have extremely high requirements for memory bandwidth and on-chip data throughput.
To this end, companies including NVIDIA and Horizon have integrated dedicated operator acceleration units, three-level cache structures, and even FP8/FP16 dynamic precision scheduling capabilities into their SoCs, aiming to enhance the chip’s adaptability to end-to-end perception-prediction-control large models.
This not only improves the model execution efficiency of the chip but also promotes the evolution of intelligent driving from modularization to full-link deep coupling.
Currently, the competitive landscape of SoC chip manufacturers at home and abroad is gradually becoming clear
*Foreign companies such asNVIDIA,Mobileye, and Qualcomm have obvious leading advantages in computing power, ecosystem, and software-hardware collaboration.
NVIDIA has formed a strong algorithm development ecosystem through the CUDA platform and has introduced the latest technologies such as FP8 computing and Transformer engines in the Orin and Thor series chips, becoming the standard configuration in the high-end intelligent driving market.
Mobileye, with its early accumulation of the EyeQ series chips, has a wide landing foundation in the mid-to-low-end ADAS market, but due to its “black box” closure, it has obvious shortcomings in supporting local algorithm flexibility.
*In contrast, domestic markets, companies like Horizon, Black Sesame Intelligence, and Huawei HiSilicon are catching up.
Horizon has built a product system covering low, mid, and high-end with its Journey series chips, with the Journey 6P achieving 560 TOPS of computing power, and the accompanying “Tiangong Kaiwu” toolchain allows algorithms to be plug-and-play, significantly lowering the integration threshold for car manufacturers.
Black Sesame Intelligence focuses on cross-domain integration of cockpit and driving, with its “Wudang” C1200 series chips supporting the integration of cockpit and intelligent driving, achieving rapid breakthroughs among independent brands with self-developed IP and high adaptability.
Huawei relies on Ascend chips and the MDC platform to enter high-level autonomous driving with a full-stack solution, leveraging the closed-loop capabilities of HarmonyOS and self-developed sensor ecosystem to form strong integration synergy.
Performance parameters of Horizon Journey series chips
The ecosystem of autonomous driving SoC chips has gradually shifted from “single-chip design” to “software-hardware collaborative platform”
New-generation suppliers represented by Horizon and Qualcomm not only provide the chip itself but also offer a complete development platform from basic software, middleware, AI toolkits to algorithm support.
After introducing these platforms, car manufacturers can achieve parallel advancement of hardware design and software development, significantly shortening development cycles and improving delivery efficiency. Especially in the context of the One Chip architecture (cockpit-driving integrated SoC) becoming an industry trend, this platform capability has become an important criterion for car manufacturers to choose chip suppliers.
*From an application perspective, current automotive-gradeSoCs can be divided into three categories based on computing power: low power, medium power, and high power:
Low power chips (such as Horizon J2/J3) mainly support L0-L2 level auxiliary driving functions and are suitable for economical models.
Medium power chips (such as Black Sesame A1000, Mobileye EyeQ5) can cover high-speed NOA and memory parking and other mid-to-high-level scenarios, widely deployed in the price range of 150,000 to 200,000 yuan.
High power chips (such as NVIDIA Orin-X, Horizon J6P) are ideal choices for urban NOA, AVP, and L3/L4 embedded systems, supporting more complex decision-making and multi-sensor fusion needs, and are expected to continue to grow in high-end models.
*From the perspective of technological evolution trends, cockpit-driving integration has become the next high point in the development of intelligent drivingSoCs.
In traditional technical solutions, the cockpit domain and intelligent driving domain are controlled by two or even multiple PCB mainboards, but this dispersed architecture has many limitations in cost, power consumption, and maintenance.
Three integration solutions are emerging: One Box, One Board, and One Chip, especially the One Chip architecture, which, under the support of 3nm process technology, Chiplet technology, and software-hardware collaborative platforms, has stronger cost control, on-chip communication capabilities, and OTA convenience, and is likely to become the mainstream selection direction in the future.
*The pace of domestic substitution is also accelerating.
On the one hand, domestic policies are gradually improvingL3/L4 intelligent driving regulations, with cities like Beijing and Wuhan taking the lead in implementing NOA-related policies, clearing regulatory obstacles for the application of domestic chips;
On the other hand, mainstream car manufacturers continue to release demands for intelligent driving, and in the process of gradually popularizing intelligent cockpits and central computing architectures, they are more willing to choose domestic manufacturers with localized support capabilities and high collaborative adaptation efficiency.
For example, Horizon’s Journey 6 series has already established cooperative relationships with over a hundred models, and Black Sesame Intelligence’s cockpit-driving chips have also been adopted by brands such as FAW, Dongfeng, and Lynk & Co, indicating that domestic SoCs have moved from “usable” to “easy to use.”
Algorithm adaptation capability determines chip performance
*In the actual implementation of intelligent driving systems, the ability to adapt algorithms often determines whether the chip’s performance can be fully realized.
The mainstream perception algorithms in the industry are gradually shifting from traditional CNN-based convolutional models to time-series modeling methods centered around Transformer.
Although Transformer has shone in language models, when transplanted to the autonomous driving field, it poses higher requirements for chip architecture. This model not only has many parameters and high computational density but also has extremely frequent data access, posing severe challenges to memory bandwidth and on-chip cache design.
*To adapt to this architectural change, chip manufacturers are undergoing technological innovations.
NVIDIA has provided a dynamic precision switching mechanism for FP8/FP16 specifically for the Transformer engine in its Hopper architecture, which not only reduces memory pressure but also improves computational efficiency.
Horizon has introduced optimization acceleration modules for commonly used operators in Transformer such as Layernorm, Softmax, and Transpose at the hardware level in its Journey 6P, significantly improving the execution speed of large models.
Similarly, Ambarella’s CV3 chip uses the CVflow architecture, effectively breaking through the “storage wall” bottleneck through three-level cache and PB-level large-capacity memory blocks.
These innovations indicate that the architectural design of intelligent driving SoCs is no longer limited to the stacking of general computing power but is deeply customized around the algorithm evolution route.
At the same time, the development model of automotive chips has also undergone fundamental changes
From the early “hardware-first, software-following” serial development model, it has evolved into the current “synchronous hardware and software, ecological co-construction” parallel development system. Traditional chip design, from IP licensing to chip tape-out, and then to software stack adaptation, takes at least two years and often three to five years, which is clearly no longer suitable in the fast-paced intelligent era.
*As a result, manufacturers such as Qualcomm, NVIDIA, and Horizon have launched their own supporting development platforms.
NVIDIA’s DRIVE platform integrates operating systems, development toolchains, reference architectures, and simulation systems; Qualcomm has launched the Ride platform equipped with dedicated AI accelerators to support flexible expansion of ODD; Horizon’s “Tiangong Kaiwu” platform supports plug-and-play algorithms, providing middleware, operator libraries, and model repositories, enabling car manufacturers to quickly complete integration and deployment from chips to vehicles.
These platform ecosystems not only greatly enhance development efficiency but also promote the diversification and standardization of software ecosystems, enhancing the generality and scalability of chips.
Horizon’s toolchain supports rapid deployment and compatibility verification of cutting-edge algorithm models such as BEV + Transformer, allowing OEMs to quickly iterate and update new functions such as urban NOA and AVP without changing chips. This integrated solution of “chip + software stack + development platform” is becoming the core competitiveness of future intelligent driving chip suppliers.
*In the face of fierce market competition, domestic SoC manufacturers are also continuously promoting platformization and product matrix strategies.
Horizon’s Journey series has achieved full coverage from low to high-end scenarios, from the initial J2, J3, J5 to the latest J6P, especially in high-end urban auxiliary driving, the landing capability and customer adaptation feedback of the Journey 6P chip are quite positive.
According to statistics, by the end of 2024, Horizon has established platform-level cooperative relationships with more than 20 domestic car manufacturers, with a cumulative number of designated models exceeding 100, and shipments are expected to exceed one million by 2025. Similarly, Black Sesame Intelligence’s “Huashan + A1000Pro + Wudang C1200” three-line product architecture is also forming advantages in multi-scenario adaptation and cross-domain integration capabilities, having completed mass production adaptation in car manufacturers such as FAW and Dongfeng.
Integration of cockpit and driving
*For domestic chips to achieve a real breakthrough, in addition to computing power and platforms, they must also achieve breakthroughs at the architectural level of “cockpit-driving integration.”
So-called cockpit-driving integration means that a single SoC supports both intelligent cockpit and autonomous driving functions. Compared to traditional two independent chip solutions, cockpit-driving integration has significant advantages in cost, energy consumption, communication latency, and OTA upgrade efficiency.
XPeng has adopted a One-Board design in its XEEA 3.5 electronic architecture, reducing chip solution costs by 40% and achieving an overall computing power increase of 50%; NIO’s new generation platform also adopts a cockpit-driving integrated architecture, directly integrating Qualcomm cockpit chips and multiple Orin-X chips for centralized functional deployment.
This design trend will gradually sink from high-end to mainstream vehicle markets under the promotion of 3nm processes and Chiplet packaging.
From the market structure perspective, the current intelligent drivingSoCs are in a stage of “overseas dominance, domestic catch-up.”
NVIDIA, with its CUDA ecosystem and Orin chips, is far ahead in the domestic high-end market, with its chip shipments expected to account for nearly 50% of China’s intelligent driving domain control chip market by early 2025.
Mobileye’s market share is also rapidly declining, mainly due to its “black box” closure strategy no longer meeting the current car manufacturers’ strong demand for algorithm openness, flexible adaptation, and localized support.
In contrast, the open platforms and customized support provided by manufacturers like Horizon and Black Sesame are gradually winning more favor from domestic car manufacturers.
Tesla’s entry into China has also injected new variables into the entire industry. ItsFSD end-to-end solution relies on large model structures such as Transformer + BEV, driving the industry to rethink computing power and algorithm adaptation. In the future, if domestic manufacturers want to achieve true end-to-end autonomous driving mass production, they must master the complete chain from data, algorithms to computing power.
This presents both pressure and opportunity for domestic SoC manufacturers; whoever can find the optimal balance between high performance, low power consumption, and fast adaptation will become the next “Orin.”
At this stage,intelligent drivingSoCs are on the eve of an explosion. By 2023, the penetration rate of L2-level autonomous driving in China has reached 42.1%, and it is expected to reach 93.5% by 2028.
With the popularization of urban NOA, gradual opening of regulations, and increasing consumer acceptance, the demand for SoC chips is expected to grow explosively.
Among them, medium power chips are expected to become the main track due to their superior cost-performance balance; high power chips will gradually land in L3/L4 models, forming a driving force for technological demonstration and platform evolution.
Intelligent drivingSoCs are not only the core computing platform of intelligent vehicles but also a strategic hub supporting the intelligent transformation of automobiles. From architectural evolution, algorithm adaptation, platform ecology to domestic substitution paths, the development of SoCs reflects the pulse rhythm of the entire intelligent driving industry.
In the tide of “architectural leap and ecological reconstruction,” Chinese manufacturers are building new competitive advantages with software-hardware collaboration, self-developed chips, and localized services. The future battlefield for intelligent driving chips will undoubtedly be a comprehensive competition of technology, ecology, cost, and strategy. In this competition, only those who continue to innovate and land quickly can truly seize the initiative.
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Contact me for inquiries about automotive-grade chip business👆🏻
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