The in-vehicle computing platform is the “brain” of intelligent connected vehicles and a barometer of the industry transformation. The entire industry chain, from hardware to software, is filled with opportunities. First, the heterogeneous hardware platform is the core of intelligent connected vehicles in the era of computing power. As the degree of intelligence in vehicles gradually increases, the demand for high-performance SoC chips continues to rise. The SoC main control chip is the segment with the highest barriers and the best business model. Additionally, the current low shipment volume of automotive chips cannot fully amortize the high R&D costs incurred initially. Various factors determine that the SoC main control chip will be an extremely scarce track in the long term, and it is a game for only a few players. International giants like NVIDIA, Qualcomm, and Intel continue to push forward in the chip sector, while domestic companies like Huawei and Horizon Robotics are catching up;
1. Decision-Making Section:
The in-vehicle computing platform consists of a hardware platform + system software + functional software.
The intelligent driving industry can be mainly divided into the perception layer, decision layer, and execution layer. This article is the second in a series on automotive intelligence, focusing primarily on the decision layer of automotive intelligence. This report explores every segment of the in-vehicle computing platform’s entire industry chain, covering its concepts, technical paths, development trends, competitive landscape, and more. The in-vehicle computing platform is the “brain” of intelligent connected vehicles, and mainly includes:
(1) Heterogeneous hardware platform: composed of CPU computing units, AI units (GPU, ASIC, FPGA), MCU control units, storage, ISP, and other hardware that make up the autonomous driving domain controller;
(2) System software: hardware abstraction layer (Hypervisor, BSP), operating system kernel (QNX/Linux/Android/Vxworks), middleware components, etc.;
(3) Functional software: general framework for autonomous driving (perception, decision, execution), general framework for functional software (data abstraction/data flow framework/basic services);
(4) Others: toolchain (development, simulation, debugging, testing, etc.), and security systems (functional safety, information security, etc.).
1. The EEA architecture is gradually moving towards domain centralization, with DCU emerging.
The number of ECUs in a single vehicle has surged, failing to meet the demands of automotive intelligence. Under the traditional EEA architecture, the ECU is the core of the system, and the upgrade of intelligent functions relies on the accumulation of ECU numbers.
The original method of upgrading intelligence faces increased R&D and production costs, reduced safety, and insufficient computing power, necessitating an upgrade of the traditional distributed architecture. The traditional EEA architecture primarily faces the following issues:(1) Excessive number of controllers: The number of ECUs in vehicles at all levels is increasing annually, with an average of 25 ECUs per vehicle, and some high-end models often exceeding 100;(2) Overly complex wiring layout: The more ECUs there are, the longer the bus length will be. The electronic system of the 2000 Mercedes-Benz S-Class already had 80 ECUs and 1,900 communication buses totaling 4 km in length. In 2007, the bus length of the Audi Q7 and Porsche Cayenne exceeded 6 km, weighing over 70 kg, making it the second heaviest component in the vehicle after the engine;(3) Increasing demand for “cross-domain” signal transmission: Intelligent driving requires a large amount of “cross-domain” signal transmission. Environmental sensors (radar, video, and lidar) generate a significant demand for data transmission, posing challenges to the traditional decentralized ECU infrastructure.
To meet the needs of intelligence, a domain-centralized architecture centered on DCU has emerged. To control bus length, reduce the number of ECUs, and thus reduce the weight of electronic components and overall vehicle manufacturing costs, the idea of classifying and integrating decentralized controllers by functional domain into more powerful domain control units (DCUs) has emerged. Bosch illustrates the direction of architectural evolution using three types of EEA architecture across six stages: distributed (modular, integrated), domain centralized (centralized, domain fusion), and centralized (on-board computer, vehicle-cloud computing).
The functional domain and spatial domain are the two current paths for the development of domain controllers. Domain controllers can be mainly classified based on five functional domains or specific physical areas of the vehicle. Compared to purely function-oriented domain controllers, those based on spatial domain classification have a higher degree of centralization and require OEM manufacturers to have stronger development capabilities:
(1) Functionally divided domain controllers: Typical representatives include Bosch and Continental, traditional Tier 1 suppliers. Bosch and Continental classify the automotive EEA architecture into five major areas: power domain (safety), chassis domain (vehicle dynamics), infotainment domain (cockpit domain), autonomous driving domain (assisted driving), and body domain (body electronics). Each area corresponds to the introduction of a corresponding domain controller, which is then connected to the backbone via communication methods such as CAN/LIN, or even hosted in the cloud, thus achieving the interaction of information data across the vehicle.
(2) Spatially divided domain controllers: Typical representatives include Tesla.
Spatially divided domain controllers are functionally divided based on specific physical areas of the vehicle, and compared to purely function-oriented domain controllers, their degree of centralization is higher. Tesla is a typical representative; the Model S in 2012 was primarily based on typical functional domain divisions, while the Model 3 launched in 2017 directly entered the quasi-central architecture phase. Tesla’s E/E architecture only includes three main parts: CCM (Central Computing Module), BCM LH (Left Body Control Module), and BCM RH (Right Body Control Module).
The central computing module directly integrates the two domains of the driving assistance system (ADAS) and infotainment system (IVI), as well as the functions of external connectivity and in-vehicle communication system domains; the left body control module and right body control module are responsible for the remaining functions of the body and convenience systems, chassis and safety systems, and part of the power system. Tesla’s quasi-central E/E architecture has led to a revolution in wiring; the wiring length of the Model S/Model X is 3 kilometers, while that of the Model 3 has been reduced to 1.5 kilometers, and the Model Y further shortened to about 1 kilometer, with Tesla’s ultimate plan to reduce wiring length to 100 meters.
The functionally divided domain centralization will be the main choice for most OEMs at present. Whether to adopt functional or spatial domains ultimately depends on the OEM’s own capabilities and the interplay with the supplier system. OEMs will increase vertical integration in the future, aiming to control core hardware and software as much as possible to create technical barriers. However, currently, based on the strategic layout of most OEMs and Tier 1 suppliers, it is expected that most OEMs will still use a hybrid domain EEA architecture, that is, part of the functional domain will be centralized, forming a transitional solution of “distributed ECU + domain controller,” ultimately leading to the architecture of “Super controller (central supercomputer) + Zonal control unit (zone controller).” This evolution process may take 5-10 years.
2. The gradual increase in vehicle intelligence leads to a sustained increase in demand for computing platforms.
Currently, autonomous driving is at a critical stage of transitioning from Level 2 to Level 3. Among them, Level 2 ADAS is the foundation for achieving higher levels of autonomous driving. According to the mass production timeline of autonomous driving across global automotive manufacturers, Level 3 autonomous driving is about to usher in large-scale commercialization.
As the level of autonomous driving increases, the number of sensors in a single vehicle is increasing exponentially. It is estimated that Level 1-2 autonomous driving requires 10-20 sensors, Level 3 requires 20-30 sensors, and Level 4-5 requires 40-50 sensors.
As the level of autonomous driving rises, the required computing power is increasing rapidly. The level of intelligence in automotive autonomous driving depends on the strength of the algorithms. From Level 1 to Level 5, as each level of autonomous driving improves, the computing power requirements also increase by an order of magnitude: before Level 3, the computing power required for autonomous driving is relatively low; Level 3 requires AI computing power of 20 TOPS; after Level 3, the computing power requirements increase by tens of times, with Level 4 approaching 400 TOPS and Level 5 requiring even stricter computing power, reaching over 4000 TOPS. With each increase in the level of autonomous driving, the demand for computing power increases by an order of magnitude. According to Intel’s estimates, in the era of fully autonomous driving, each vehicle will generate up to 4000 GB of data per day.
3. Hardware Platform One: Chips
1. Computing chips are the core of intelligent connected vehicles in the era of computing power.
Computing chips can be divided into MCU chips and SoC chips. With the continuous innovation of automotive EE architecture and the rapid development of automotive semiconductors, automotive semiconductors can be categorized by function into automotive chips and power semiconductors, with computing chips being the most important among automotive chips. Depending on the level of integration, they can be divided into MCU chips and SoC chips.
MCU (Micro Control Unit) is a microcontroller that integrates the CPU, RAM, ROM, timer, and various I/O interfaces into a single chip, forming a chip-level chip; while SoC (System on Chip) refers to a system-level chip that, unlike the MCU, has built-in RAM and ROM and can run an operating system.
The trend towards intelligence drives the transition of automotive chips from MCU to SoC. Autonomous driving imposes higher requirements on the underlying hardware of vehicles. A single chip that performs a single function can only provide simple logical calculations and cannot provide strong computing power support. The new EE architecture promotes the transition of automotive chips from single-chip MCU to system-level SoC.
The SoC market is growing rapidly, with an expected market size of $12 billion by 2026. The acceleration of automotive intelligence has increased the demand for automotive-grade SoCs and driven their development. Compared to the steady growth of automotive MCUs, the SoC market is showing a trend of rapid growth. According to Global Market Insights, the global automotive-grade SoC market is expected to grow from $1 billion in 2019 to $16 billion by 2026, with a CAGR of 35%, far exceeding the overall growth rate of automotive semiconductors during the same period.
2. Traditional MCU: Demand for MCUs is steadily increasing, with long-term monopoly by overseas oligopolies.
As automotive intelligence continues to penetrate, the demand for MCUs in a single vehicle is increasing. With the evolution of automotive EE architecture, the demand for MCUs per vehicle is steadily increasing. The wave of autonomous driving has driven the demand for MCUs. According to IHS statistics, the number of MCUs required for intelligent driving vehicles is more than four times that of traditional fuel vehicles, and high-performance MCUs will play an important role due to their high computing power.
The MCU market is steadily developing, with an expected global size of $8.8 billion by 2026. In terms of market size, the global MCU market is showing a trend of steady development. According to IC Insights, it is estimated that the global MCU market size will grow from $6.5 billion in 2020 to $8.8 billion by 2026, with a CAGR of 5.17%, slightly lower than the growth rate of automotive semiconductors during the same period. Meanwhile, the development of MCUs in China is keeping pace with the world, with an expected market size of 5.6 billion yuan by 2026 and a CAGR of 5.33%, roughly in line with the global average.
Renesas, NXP, Infineon, and other overseas manufacturers occupy a major market share, while domestic manufacturers have low penetration rates. Currently, the global MCU market is characterized by oligopolistic competition, with leading manufacturers like Renesas, NXP, and Infineon being international players, with a CR7 share reaching 98%. Due to the long R&D cycles and high certification requirements for automotive-grade MCUs, the penetration rate of domestic manufacturers is low, with only a few companies able to achieve mass production of mid-to-low-end products.
3. Intelligent cockpit SoC: Qualcomm presents a monopoly in mid-to-high-end digital cockpits.
Multi-screen integration is continuously popularizing, with Qualcomm monopolizing the mid-to-high-end digital cockpit market. Currently, Qualcomm has won the infotainment and digital cockpit projects of over 20 leading automotive manufacturers globally. The Qualcomm Snapdragon 820A and 8155 platforms have become mainstream choices for many vehicle digital cockpit platforms. Qualcomm is also set to launch the fourth-generation cockpit SoC SA8295, which performs excellently in terms of computing power and I/O capabilities, continuously solidifying its position in the mid-to-high-end digital cockpit market.
4. Autonomous driving SoC: CPU + XPU is the current mainstream, with NVIDIA currently leading.
Autonomous driving chips refer to SoC chips that can achieve high-level autonomous driving. As the level of intelligence in autonomous driving vehicles increases, the amount of data that needs to be processed is also growing. High-precision maps, sensors, and lidar hardware and software devices impose higher requirements on computing. Therefore, in addition to the CPU as a general processor, adding AI-capable accelerator chips has become mainstream. Common AI accelerator chips include GPU, ASIC, and FPGA.
The CPU, as a general processor, is suitable for handling a moderate amount of complex calculations. In addition to meeting computing requirements, the CPU can handle complex conditions and branches, as well as synchronization and coordination between tasks. The CPU chip requires a lot of space for branch prediction and optimization, saving various states to reduce latency during task switching. This makes it more suitable for logic control, serial computation, and general-type data processing. For example, comparing GPU and CPU, the GPU uses numerous computing units and ultra-long pipelines but has very simple control logic and omits Cache. In contrast, the CPU is heavily occupied by Cache and has complex control logic and many optimization circuits, making its computing power only a small fraction.
“CPU + XPU” is the current mainstream trend in the design of autonomous driving SoC chips. Depending on the choice of XPU, it can be categorized into three technical routes: CPU + GPU + ASIC, CPU + ASIC, and CPU + FPGA.
(1) “CPU + GPU + ASIC” is mainly represented by NVIDIA, Tesla FSD, and Qualcomm Ride. NVIDIA’s Xavier and Tesla’s FSD adopt the “CPU + GPU + ASIC” design route. NVIDIA’s Xavier uses the GPU as the computing core, mainly consisting of four modules: CPU, GPU, and two ASIC chips, Deep Learning Accelerator (DLA) and Programmable Vision Accelerator (PVA); Tesla’s FSD chip uses NPU (ASIC) as the computing core, with three main modules: CPU, GPU, and Neural Processing Unit (NPU).
(2) “CPU + ASIC” is mainly represented by Mobileye EyeQ5 series and Horizon Journey series. Mobileye EyeQ5 and Horizon Journey series adopt the “CPU + ASIC” architecture. EyeQ5 mainly has four modules: CPU, Computer Vision Processors (CVP), Deep Learning Accelerator (DLA), and Multithreaded Accelerator (MA), where CVP is an ASIC designed for traditional computer vision algorithms; Horizon has independently developed an AI-specific ASIC chip, Brain Processing Unit (BPU).
(3) CPU + FPGA is mainly represented by Waymo. Unlike other manufacturers, Waymo adopts the “CPU + FPGA” architecture, with its computing platform using Intel Xeon CPUs with 12 or more cores, paired with Altera’s Arria series FPGA.
Currently, the latest chip platforms released by various manufacturers can support the computing power requirements of Level 3 or Level 4, with NVIDIA currently in the lead. The computing power of a single Orin chip from NVIDIA can reach 254 TOPS, while in models launched in 2022, such as NIO ET7 and WM Motor M7, equipped with four Orin chips, the peak computing power will exceed 1000 TOPS. The peak computing power of Qualcomm’s Snapdragon Ride platform is expected to be between 700-760 TOPS, and Mobileye has also launched the EyeQ6 Ultra for high-level autonomous driving, reaching a computing power of 176 TOPS. Currently, the most advanced computing platforms from various manufacturers can support the computing power requirements of Level 3 or Level 4. From the perspective of related mass-produced models, NVIDIA’s Orin has become the mainstream choice, while Mobileye is gradually falling behind.
3. Hardware Platform Two: Domain Controllers
1. For high-level autonomous driving, heterogeneous multi-core hardware architecture is becoming a trend.
The in-vehicle computing platform must adopt a heterogeneous multi-core chip hardware architecture. Autonomous driving domain controllers must have capabilities for multi-sensor fusion, positioning, path planning, decision control, wireless communication, and high-speed communication. They typically require external connections to multiple cameras, millimeter-wave radars, lidars, and IMUs, completing functions including image recognition and data processing. For L3 and above high-level autonomous driving, a single chip cannot meet the numerous interface and computing power requirements, and the computing platform must adopt a heterogeneous chip hardware solution, which has the advantages of flexible chip selection, configurable expansion, and stackable computing power.The heterogeneous distributed hardware architecture of the computing platform mainly includes CPU computing units, AI units, and control units.
High-performance in-vehicle computing platforms are essential for high-level autonomous driving. In addition to a heterogeneous multi-core hardware architecture, features such as distributed elastic scalability, rich I/O interface resources, high memory bandwidth, automotive-grade and functional safety are also essential characteristics of high-level autonomous driving domain controllers.
2. High-performance SoC main chips account for the majority of overall domain controller costs.
The most mature domain controller on the market is Tesla’s HW 3.0, launched in 2019. Tesla introduced its self-developed FSD chip for the first time, using Ethernet buses to carry data input and Ethernet switching functions. Its cost is relatively transparent. By breaking down its BOM costs, we can outline the cost distribution of high-level autonomous driving domain controllers. It is estimated that the total cost of all chips on the HW 3.0 board is around 5000 yuan, plus automotive-grade connectors, Ethernet connectors, and PCB and other peripheral hardware, bringing the total hardware cost of the board to about 7500-8500 yuan. Among them, the main SoC chip accounts for about 61% of the total chip cost and about 20% of the overall hardware cost. Tesla’s HW 3.0 board is equipped with two self-developed chips, and the dual-chip design serves as safety redundancy, allowing for independent computation. Each chip is surrounded by four Micron DRAM memory modules, and each chip is paired with a Toshiba flash memory chip to host the operating system and deep learning models.
3. OEM self-research, system integrators, and software platform vendors each play their roles.
Players in the autonomous driving domain controller market can be mainly divided into three categories: system integrators, software platform vendors, and OEM manufacturers.(1) OEM Manufacturers: Tesla and domestic new energy vehicle manufacturers such as NIO, Xpeng, WM Motor, Li Auto, and SAIC Zhiji have either implemented or announced plans to develop their autonomous driving domain controllers to gain control over the underlying hardware in the future of software-defined vehicles;(2) System Integrators and Tier 1 Suppliers: International Tier 1 suppliers and system integrators such as Bosch, Continental, and ZF, as well as local Tier 1 suppliers and system integrators like Desay SV, Jingwei Hirain, and Huawei;(3) Software Platform Vendors: Companies such as Inceptio Technology, Neusoft Ruichi, TTech, and Zhongke Chuangda.
(1) Intelligent Cockpit Domain Controllers: Globally, Visteon, Continental, Bosch, and Aptiv dominate the cockpit domain controller market. Domestic companies like Huawei, Desay SV, Hangsheng Electronics, and Neusoft have also launched cockpit domain controller solutions. In terms of cockpit SoC chips, they mainly include Qualcomm 820A and 8155P, Intel Atom, NXP i.MX8, Renesas R-CAR H3, and Texas Instruments Jacinto series.
(2) Autonomous Driving Domain Controllers: Globally, major Tier 1 suppliers have basically laid out autonomous driving domain controller products, with typical products including Visteon’s DriveCore, Bosch’s DASy, Continental’s ADCU, ZF’s ProAI, Veoneer Zeus, and Magna MAX4. Domestically, there are Desay SV’s IPU series, Jingwei Hirain’s ADC, Neusoft Ruichi’s CPDC, and Huawei’s MDC.
4. System Software One: Operating Systems
Operating system standards and classifications: Vehicle control OS and cockpit OS.
In the era of intelligent connectivity, vehicle operating systems (OS) can be divided into two main categories based on downstream applications: vehicle control OS and cockpit OS.(1) Vehicle Control OS: Mainly responsible for implementing vehicle chassis control, power systems, and autonomous driving, directly related to the vehicle’s driving decisions; (2) Cockpit OS: Mainly provides control platforms for in-vehicle infotainment services and human-machine interaction, serving as the operating environment for achieving cockpit intelligence and multi-source information integration, without directly participating in the vehicle’s driving decisions.
For vehicle control OS, they can be divided into embedded real-time operating systems (RTOS) and POSIX standard-based operating systems.(1) Embedded Real-Time Operating Systems (RTOS): Embedded OS running on the main control chip MCU in traditional vehicle control ECUs, aimed at classic vehicle control fields such as power systems, chassis systems, and body systems. They require real-time programs to respond within strict time limits and are characterized by speed, high throughput, and compact code; (2) POSIX Standard-Based Operating Systems: Mainly aimed at intelligent driving systems, meeting their high communication and low latency requirements.
Automotive electronic control ECUs must use highly stable embedded real-time operating systems. The mainstream embedded real-time operating systems are compatible with the OSEK/VDX and Classic AUTOSAR automotive electronic software standards. Embedded real-time operating systems have advantages of high reliability, real-time performance, interactivity, and multi-path capabilities, with system responses typically in the millisecond or microsecond range, meeting high real-time requirements. Currently, mainstream embedded real-time operating systems are compatible with the OSEK/VDX and Classic AUTOSAR automotive electronic software standards.
QNX and Linux are currently the preferred kernels for vehicle OS. According to statistics from CCID Consulting, QNX, due to its typical real-time performance, low latency, and high stability, reached a market share of 43% in 2021, making it the most widely used vehicle OS, applied in over 40 brands including BMW, Audi, and Mercedes-Benz, with over 175 million vehicles globally using QNX.
QNX + Linux or QNX + Android are the main choices for current intelligent driving OS + intelligent cockpit OS. Currently, QNX and Linux (including Android) remain the main choices for the underlying kernel of OS, whether for intelligent driving OS or intelligent cockpit OS, generally adopting a combination of QNX + Linux or QNX + Android. Real-time operating systems represented by QNX are mainly used in driving OS, while the cockpit OS is primarily based on Android and customized or ROM-based systems based on Linux due to a relatively weak application ecosystem.