RISC-V (Reduced Instruction Set Computing – V) is no longer just a nominal alternative to x86 and ARM; it now possesses the strength to share the world with the latter two.The Instruction Set Architecture (ISA) is the abstract interface provided by the processor to software (operating systems, compilers, applications). RISC-V, with its open standards and flexible architecture, is becoming a significant driving force for global chip innovation. “Looking ahead to the future development of CPUs in China, an ISA that can be autonomous, controllable, and prosperous has almost become a necessity,” said Dai Weimin, founder, chairman, and president of Chipone Technology (688521.SH), at the recent 5th RISC-V China Summit.China is a major player in RISC-V. According to Shi Huikang, deputy director of the Electronic Information Department of the Ministry of Industry and Information Technology, it was reported at the summit that by 2024, the global shipment of chips based on the RISC-V instruction set will reach hundreds of billions, with more than half coming from China.Currently, RISC-V has made breakthroughs in high-performance computing, artificial intelligence, servers, automotive electronics, and other related fields. “The RISC-V ecosystem is visibly growing; major chip manufacturers like Qualcomm, NVIDIA, and Infineon have clearly expressed their support for RISC-V. Overall, RISC-V is on the brink of a major explosion,” said Zhang Guobin, founder of Electronic Innovation Network, to reporters from China Business News.It is noteworthy that RISC-V’s performance in high-end markets such as HPC (High-Performance Computing) is also improving. Andrea Gallo, CEO of the RISC-V International Foundation, stated that RISC-V has extended from embedded computing to storage technology and high-performance computing, showcasing the strong momentum of this architecture.
The cumulative shipment is expected to exceed 20 billion unitsSince its inception in 2010, RISC-V has gradually experienced explosive growth, thanks to the joint efforts of the global academic and industrial communities, and has now become one of the three most important processor instruction set architectures alongside x86 and ARM. In 2022, the RISC-V International Foundation announced that the total shipment of chips featuring RISC-V cores had exceeded 10 billion units. Achieving this milestone took RISC-V 12 years, while ARM took 21 years, and x86 took about 30 years or even longer.It is worth noting that Krste Asanovic, the chief architect of the RISC-V International Foundation, known as the “father of RISC-V,” and Jim Keller, CEO of the well-known RISC-V startup Tenstorrent (referred to as the “architect god”), made rare appearances at this year’s RISC-V China Summit in different forms.Jim Keller stated, “In the past decade, CPU performance improvements were mainly driven by process technology; in the next five years, the changes brought by flexible instruction sets and open-source collaboration will surpass the total of the previous decade.” He emphasized that the openness of RISC-V is fostering an unprecedented speed of innovation. Additionally, Tenstorrent also disclosed its “Open Chiplet Architecture (OCA)” roadmap for the first time.Tenstorrent’s chief architect, Lian Weihang, stated that OCA is expected to reduce the R&D cost of a single chip from $1-2 billion to several hundred million dollars. Meanwhile, Tenstorrent unveiled its CPU product blueprint: the RISC-V CPU core codenamed Ascalon has achieved performance comparable to the latest AMD Zen 4/5, with an expected annual performance increase of about 10% over the next two to three years; they plan to launch the world’s fastest CPU, Callandor, in 2027.Moreover, NVIDIA, a star company in the tech circle, has also rarely elaborated on its RISC-V product strategy. Frans Sijstermans, NVIDIA’s vice president of hardware engineering, revealed that NVIDIA is actively advancing the porting of CUDA to the RISC-V architecture, which was previously only deployed on x86 and ARM architectures.Frans Sijstermans also added that NVLink Fusion now supports customers using their own RISC-V CPUs, not just traditional x86/ARM architecture CPUs, thus integrating RISC-V CPUs, GPUs, network chips, and NVLink interconnect technology to build a complete data center-level architecture.According to relevant data, NVIDIA’s shipments of RISC-V-based GPUs have exceeded 1 billion units in 2024. However, it should be noted that NVIDIA has used customized RISC-V controllers in its existing GPUs, primarily for management tasks related to power, display, and security, which are difficult to consider as the main body of the GPU.“In the EDA tool sector, leading companies like Synopsys, Huada Empyrean, and GSI Technology are also strongly supporting RISC-V. In terms of product categories, RISC-V has covered multiple fields including CPU/DSP/MCU, computing processors, and automotive electronics,” Zhang Guobin stated.Market research firm SHD predicts that by 2031, the cumulative shipment of RISC-V chips will exceed 20 billion units, widely penetrating consumer electronics, automotive, HPC, and other fields.
Mainstream Path Still Requires Efforts
There are opinions in the industry that compared to the ecosystems established by x86 in PCs and servers, and ARM in mobile phones, the main issue with the RISC-V ecosystem is that it is “over-specialized and under-generalized.”“RISC-V’s application footprint has already spread across multiple key scenarios in the embedded field, but the overall foundation is still not solid enough, and the development structure shows characteristics of ‘over-specialization and under-generalization,'” said Hu Zhenbo, founder of Chiplet Technology.From being a “lightweight player” in the IoT field to a “challenger” in high-performance computing, RISC-V urgently needs a critical transformation from specialization to generalization to find the next iPhone moment.Taking RISC-V’s development in the HPC (High-Performance Computing) field as an example, Huang Yefeng, a senior industry analyst in the semiconductor sector, stated that most people almost universally agree that there are no issues with RISC-V in high-performance fields, which has become a consensus. “This year’s RISC-V China Summit main forum speeches have seen more than half of the speakers discussing HPC. Moreover, unlike the past two to three years, these speakers are no longer focusing on the performance parameters of their own RISC-V products,” he said.Although RISC-V has come a long way, there is still work to be done to become mainstream in HPC. Leendert van Doorn, senior vice president of Qualcomm, stated that as RISC-V chips ultimately need to scale and expand computing power, participants must embrace platform and ecosystem thinking.He believes that open standards and community collaboration are inherent advantages of RISC-V, especially the instruction set matrix, AI-related extensions, and different versions of Profile configurations (personalized settings for different environments or application scenarios), allowing this instruction set and ecosystem to adapt to various applications at a relatively consistent pace.“On this basis, there must first be platform thinking. In addition to CPUs, we must also consider accelerators, IO controllers, buses, firmware, and software, standardizing various platform functions, and fully utilizing the existing ecosystem (such as reusing proven standards) and trimmed platform Profiles,” Leendert van Doorn also pointed out that even though ARM has been in the server market for a long time, its ecosystem’s maturity is still far behind that of x86.Regarding the “ecosystem thinking,” an important suggestion mentioned by Leendert van Doorn is to start binary translation early, as well as hybrid solutions like ARM64EC (which allows native and emulated code to run together).Although RISC-V currently has the drawback of an immature software ecosystem, with the backing and leadership of many leading manufacturers, RISC-V’s shortcomings are being rapidly addressed as it enters the high-performance computing market.International RISC-V manufacturers such as SiFive, Ventenna, and Tenstorrent are mainly focusing on high performance, Chiplet, and RISC-V DataFlow directions; while domestic RISC-V companies like OpenChip Institute, Zhihui Computing, and Jinxuan Timing Control are primarily working on industrial ecology, high performance, and IOMMU virtualization.
Expected to Share the World
“Without China’s innovation and support, there would be no RISC-V today,” said Andrea Gallo, CEO of the RISC-V International Foundation.From 2019 to 2020, RISC-V experienced its first wave of explosion in the embedded market, primarily in IoT smart homes. A large number of domestic RISC-V companies emerged, including Chiplet Technology and Saifang Technology, as well as RISC-V companies founded by BOE founder Wang Dongsheng.From the perspective of A-share companies, companies like GigaDevice (603986.SH), Zhongke Blue Letter (688332.SH), and Espressif (688018.SH) all launched RISC-V-based chip products for the first time between 2019 and 2020; Chipone Technology, Beijing Junzheng (300223.SZ), Allwinner Technology (300458.SZ), and Guoxin Technology (688262.SH) are also advancing projects for mass production of IP or chip products based on the RISC-V instruction set.This year, the RISC-V concept has also been active in IPOs. In May, Yisiwei Computing submitted its prospectus to the Hong Kong Stock Exchange; meanwhile, Qinheng Microelectronics has been accepted for IPO on the Sci-Tech Innovation Board, notably maintaining profitability.From 2022 to 2024, Qinheng Microelectronics reported a total revenue of 943 million yuan, with a net profit of 235 million yuan, accounting for 24.92% of its revenue.Data from SHD Research Institute indicates that by 2031, shipments of RISC-V architecture processors will exceed 20 billion units, with a market penetration rate of 25.7%. By then, RISC-V’s market share in major sectors such as consumer electronics, computing, automotive, data centers, industrial, and networking will reach 39%, 33%, 31%, 28%, 27%, and 26%, respectively.Qixiaoning, vice president of Alibaba Group and head of the Damo Academy’s Xuan Tie team, pointed out that RISC-V has already formed a three-way division in the embedded field, and now we need to develop towards HPC. “I believe that based on this trend, RISC-V will share the world in various fields, and even become a dominant architecture in high performance and large computing power within the next 15 years,” Qixiaoning stated.Source: China Business NewsReporter: Li YuyangEditor: Wu QingProofreader: Zhai JunReviewer: Li Zhenghao
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