According to predictions by SHD Group, the global RISC-V market size will reach $92.7 billion by 2030, with a compound annual growth rate of 47.4%. The RISC-V Foundation predicts that from 2021 to 2027, RISC-V cores from China will account for 50% of global shipments.
Although RISC-V is widely regarded as the future mainstream instruction set architecture, the current industry implementation still faces multiple practical challenges.
On July 17, at the 2025 RISC-V China Summit held in Shanghai, Professor Bao Yungang, Deputy Director of the Institute of Computing Technology at the Chinese Academy of Sciences, Secretary-General of the China Open Instruction Ecosystem (RISC-V) Alliance, and Chief Scientist at the Beijing Open Source Chip Research Institute, delivered a speech titled “Observations and Thoughts on RISC-V Ecosystem Construction.” He systematically analyzed the current status and challenges of RISC-V industry implementation, emphasized the core role of the open-source model in structural cost reduction and ecosystem building, and showcased the practical results of collaboration between the Chinese Academy of Sciences and the industry.
Professor Bao Yungang, Deputy Director of the Institute of Computing Technology at the Chinese Academy of Sciences, Secretary-General of the China Open Instruction Ecosystem (RISC-V) Alliance, and Chief Scientist at the Beijing Open Source Chip Research Institute
In his speech, Bao Yungang listed typical confusions enterprises face when promoting RISC-V:
Company A: What is RISC-V?
Company B: If ARM works well, why switch to RISC-V?
Company C: What scenarios do RISC-V chips target?
Company D: The software that customers want to use cannot be installed, how can I promote it?
Company E: Is there a turn-key solution? How much cheaper is it than ARM?
Company F: Porting and developing software on RISC-V chips is an investment; how can software development be profitable?
Company G: There are plenty of people who understand ARM solutions, but where can I find someone who understands RISC-V technical support?
……
“These questions can be categorized into four types: insufficient products and solutions, inadequate software and hardware toolkits, a shortage of talent, and a lack of industry confidence,” Bao Yungang stated. He particularly mentioned that the market urgently needs high-performance and cost-effective RISC-V chips as benchmark cases, such as a solution that competes with RK3588 but is 25% cheaper, which is still scarce. Additionally, in software ecosystems like OpenEuler, the number of software packages for RISC-V is only 10% of that for x86/ARM, and the completeness of the toolchain remains a shortcoming.
The Differentiated Advantages and Innovative Pathways of RISC-V
In response to the aforementioned challenges, Bao Yungang proposed several core understandings of RISC-V.
First is to transcend the “replacement” mindset. The value of RISC-V lies not only in replacing ARM but also in its openness and customizability. Through open-source implementations and toolchains, companies can significantly reduce R&D costs, giving rise to business models similar to “Linux + RedHat.”
Secondly, agile development must be integrated with hardware and software collaboration. The modular design of RISC-V allows developers to quickly customize chips, combining with emerging demands like AI to promote a new model of “APP development teams → integrated hardware and software solutions.”
Third is the integration of AI and RISC-V. The unique requirements for AI inference computing power provide new opportunities for RISC-V, as its flexible instruction set extension capabilities can adapt to diverse computing scenarios. Close collaboration with CPU design and diverse demands will make RISC-V + AI a new combination for the future.
Finally, building a win-win ecosystem for developers. Currently, in the RISC-V ecosystem, chip companies benefit significantly from financing or IPOs, but software developers have not yet formed a sustainable profit model. Bao Yungang called for exploring new value distribution mechanisms to benefit more participants.
Open Source Practice: Xiangshan Series Assists in Structural Cost Reduction
Bao Yungang highlighted the “Xiangshan” open-source computing subsystem project promoted by the Chinese Academy of Sciences. This project significantly reduces chip R&D costs through an open-source collaborative development model. For example, in the case of a 64-core server chip with a production volume of 100,000 units, traditional commercial IP licensing fees and royalties account for 35% of the total cost (approximately 250 million yuan), while the open-source solution can save 250 million yuan in R&D costs, reducing the IP cost proportion to 2%.
Currently, the “Xiangshan” has launched three computing subsystems:
·Nanh Lake: Comparable to ARM A76 level, suitable for terminal fields.
·Kunming Lake: Targeting ARM N2 level, supporting RVA23 virtualization extensions, with performance reaching 15 SPECint/GHz (optimized can reach 18.5 SPECint/GHz). V3 is progressing towards a single-core target of 22 SPECint/GHz while enhancing security features (such as confidential virtual machines), with relevant standards being promoted in international foundations.
·Zhujiang and Wenyu River: Two on-chip interconnect networks (NoC), optimized for general computing and intelligent computing, with the latter supporting 32KB multicast transmission and bandwidth up to 3.99TB/s.
From the perspective of industry implementation progress, user company Jindeshikong has integrated the Kunming Lake V2 into their SoC, successfully running a virtual machine with a 4-core configuration, and is expected to complete tape-out in September. Yiswei Computing’s edge computing SoC based on Xiangshan won the AWE 2025 “Aiplan Core Award.”
It is reported that the Xiangshan compiler (XSCC) is developed based on LLVM, with a performance improvement of 20% after optimization, and has been merged into the LLVM mainline.
High-Quality Open Source Verification and Industry Collaboration
In response to doubts about whether “open source can ensure product quality,” Bao Yungang emphasized: “Open source does not equal low quality.” In the past year, the “Xiangshan” project has completed over 20,000 test cases, covering unit tests, integration tests, and system-level tests, with a functional point coverage rate of 100%, identifying and fixing 1,470 bugs, nearly 500 of which were contributed by partner companies (such as Yiswei, Jindeshikong, etc.), with verification tools from companies like Hejian Software and Xinhua Zhang.
“Xiangshan” subsystems are also accelerating iteration, with expectations:
· A 4-core version will be delivered in Q4 2025, with the first tape-out expected in September;
· Plans to launch 8-core, 16-core, and 64-core versions in Q3 2026.
The open-source model will bring structural changes. Currently, open-source software code accounts for 77%, and Bao Yungang revealed that the proportion of open-source IP in future chips will break 0 and continue to grow, further reducing design costs and enhancing corporate competitiveness. He called for more companies to participate in building the ecosystem, drawing on the successful experience of Linux to promote RISC-V as the open-source mainline supporting industrial development.
Conclusion
Bao Yungang concluded that the scaling of RISC-V requires not only technological breakthroughs but also the construction of an open and collaborative industrial ecosystem. “Through the open-source model, we are exploring new paths for structural cost reduction and creating more value for developers and enterprises.” He believes that with the advancement of projects like “Xiangshan,” RISC-V will achieve breakthroughs in fields such as servers and AI, ultimately dominating the global market.