RISC-V (Reduced Instruction Set Computing – V) is no longer just a nominal alternative to x86 and ARM; it now possesses the strength to share the world with the latter two.The Instruction Set Architecture (ISA) is the abstract interface provided by the processor to software (operating systems, compilers, applications). RISC-V, with its open standards and … Read more
On July 18, 2025, during the second day of the 2025 RISC-V China Summit’s “High-Performance Computing Sub-Forum,” Liu Yanan, the chip technology director of China Mobile Cloud Capability Center, discussed the current implementation of RISC-V in the data center field from various aspects including industrial policy, advantages of RISC-V, and the current status and challenges … Read more
As the “nerve center” connecting various electronic systems in vehicles, automotive communication chips must ensure high-speed transmission of massive data while guaranteeing zero-latency processing of critical information, laying the foundation for a safe and efficient intelligent driving experience. Editor / Rongge In the wave of automotive intelligence and connectivity, automotive communication chips have become the … Read more