SPI (Serial Peripheral Interface)
SPI is a high-speed, full-duplex, synchronous, serial communication bus with a 3-4 wire interface, operating in a master-slave mode, allowing multiple SPI devices to be interconnected.
The SPI device that provides the SPI serial clock is the SPI master, while other devices are the SPI slaves. The SPI bus consists of three signal lines: SCLK (serial clock), SDI (serial data input), and SDO (serial data output). When there are multiple slave devices, an additional chip select line (CS) can be added to control whether the chip is selected, enabling multiple SPI devices to connect on the same bus.
If simulating the SPI bus using GPIO pins, one output pin (SDO), one input pin (SDI), and another pin depending on the type of device being implemented are required. If implementing a master-slave device, both input and output pins are needed; if only a master device is implemented, only an output pin is needed; if only a slave device is implemented, only an input pin is needed. SDI – master device data input, slave device data output; SDO – master device data output, slave device data input; SCLK – clock signal generated by the master device; CS – slave device enable signal controlled by the master device.
SPI is a protocol that allows a master device to initiate synchronous communication with a slave device, thus completing data exchange. SPI is a serial protocol, meaning data is transmitted bit by bit, which is why the SCLK clock line exists. The SCLK provides clock pulses, while SDI and SDO complete data transmission based on these pulses. Data output occurs through the SDO line, with data changing on the rising or falling edge of the clock and being read on the subsequent falling or rising edge. Completing one bit of data transmission follows the same principle for input. Thus, at least eight clock signal changes (one rising and one falling edge) can complete the transmission of eight bits of data. This transmission method has an advantage; unlike ordinary serial communication, which continuously transmits at least eight bits of data at once, SPI allows data to be sent one bit at a time and even allows pauses because the SCLK clock line is controlled by the master device. When there are no clock transitions, the slave device neither collects nor transmits data. This means the master device can control communication by controlling the SCLK clock line.
SPI is also a data exchange protocol: because the data input and output lines of SPI are independent, it allows simultaneous data input and output. The implementation of different SPI devices varies, mainly due to the different timing of data changes and collection, with different definitions for collecting data on the rising or falling edge of the clock signal; refer to the relevant device documentation for specifics.
Lastly, a disadvantage of the SPI interface is that there is no specified flow control and no acknowledgment mechanism to confirm whether data has been received.
In point-to-point communication, the SPI interface does not require addressing operations, and being full-duplex communication makes it simple and efficient. In systems with multiple slave devices, each slave device requires an independent enable signal, making the hardware slightly more complex than I2C systems. The SPI interface is mainly used in EEPROMs, FLASH, real-time clocks, AD converters, and between digital signal processors and digital signal decoders.
UART (Universal Asynchronous Receiver Transmitter)
The UART bus is a two-wire, full-duplex, asynchronous serial port with a slower speed. It is much more complex than the synchronous serial structures of SPI and I2C, generally consisting of a baud rate generator (which generates a baud rate equal to 16 times the transmission baud rate), a UART receiver, and a UART transmitter. There are two lines in hardware, one for sending and one for receiving. Data is transmitted asynchronously, with strict timing requirements for both parties, and the communication speed is not very fast, making it most commonly used in multi-machine communication. If simulating the UART bus using GPIO pins, one input pin and one output pin are needed.
UART is a chip used to control communication between computers and serial devices, providing an RS-232C data terminal equipment interface, allowing computers to communicate with modems or other serial devices using RS-232C interfaces. Most computers contain two RS-232-based serial ports. Serial ports are also a common communication protocol for instrumentation devices; many GPIB-compatible devices also come with RS-232 ports. Additionally, serial communication protocols can be used to obtain data from remote acquisition devices. The concept of serial communication is quite simple, sending and receiving bytes bit by bit. Although it is slower than parallel communication, which sends data by byte, serial communication can send data over one wire while receiving data over another wire. It is simple and can achieve long-distance communication. As part of the interface, UART also provides the following functions:
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Convert parallel data sent from within the computer into an output serial data stream;
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Convert serial data from external sources into bytes for use by devices within the computer that use parallel data;
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Add parity bits to the output serial data stream and perform parity checks on received data streams;
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Add start and stop markers to the output data stream and remove them from the received data stream;
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Handle interrupt signals sent from keyboards or mice;
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Manage synchronization issues between the computer and external serial devices;
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Some high-end UARTs also provide buffers for input and output data; the latest UART, 16550, can store 16 bytes of data in its buffer before the computer needs to process it.
I2C (Inter-Integrated Circuit)
The I2C bus is a bidirectional, two-wire (SCL, SDA), synchronous, serial, multi-master interface standard with competition detection and bus arbitration mechanisms, making it very suitable for close-range, infrequent data communication between devices. In the I2C protocol system, when transmitting data, the address of the destination device is included, allowing for device networking.
If simulating the I2C bus using GPIO pins and implementing bidirectional transmission, one input/output pin (SDA) and one output pin (SCL) are required.
The main advantage of the I2C bus is its simplicity and efficiency. I2C can replace standard parallel buses and connect various integrated circuits and functional modules. It only requires two bus lines: one serial data line (SDA) and one serial clock line (SCL).
I2C is a multi-master bus, with each device on the bus having a unique address. Depending on their capabilities, any device capable of sending and receiving can operate like a master and control the bus. However, only one master can operate at any given time; if two or more masters simultaneously initiate data transmission, conflict detection and arbitration prevent data corruption.
A master can control the transmission of signals and clock frequency. The synchronous clock allows devices to communicate over the bus at different baud rates. The synchronous clock can serve as a handshake method for stopping and restarting serial port transmissions.
Because the interface is directly on the component, the I2C bus occupies very little space, reducing the board space and the number of chip pins required, thus lowering interconnection costs. The bus length can reach up to 25 feet and supports up to 40 components at a maximum transmission rate of 10Kbps.
Serial 8-bit bidirectional data transmission bit rates can reach 100kbit/s in standard mode, 400kbit/s in fast mode, and 3.4Mbit/s in high-speed mode.
On-chip filters can eliminate glitches on the bus data lines, ensuring data integrity. I2C uses pull-up resistors and has weak anti-interference capability, generally used for communication between chips on the same board, and less often for long-distance communication. The number of ICs connected to the same bus is limited only by the maximum bus capacitance of 400pF.
The article is reproduced from: ivy_reny’s blog
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