Memory Isolation Issues in a Multitasking Environment
In a multitasking operating system, multiple programs run simultaneously, each with its own data area. Suppose there are three programs, each with a variable offset address of 200h. The system needs a mechanism to distinguish these variables to prevent them from interfering with each other.
x86 Solution: Segmentation Mechanism
The x86 processor uses a segmentation mechanism to solve this problem, converting logical addresses to physical addresses in one or two steps.
Step One: Logical Address → Linear Address
Linear Address = Segment Base Address + Offset Address
Components of a Logical Address:
- Segment Selector: Specifies the segment to be used
- Offset Address: Position within the segment
Conversion Process:
- Find the corresponding segment descriptor in the descriptor table based on the segment selector
- Obtain the segment base address from the segment descriptor
- Add the segment base address to the offset address to get the linear address
Assembly Language Example
; Assume the DS register contains the segment selector pointing to the current data segment
MOV AX, [200h] ; Logical Address: DS:200h
; Conversion Process:
; 1. Get the segment selector from DS
; 2. Find the corresponding segment descriptor in GDT or LDT
; 3. Get the segment base address (assumed to be 10000h)
; 4. Calculate the linear address: 10000h + 200h = 10200h
Example of Variable Distinction for Three Programs
Assume there are three tasks (programs), each with its own Local Descriptor Table (LDT):
Configuration of Task 1:
; Segment descriptor in LDT1
; Segment Base Address = 30000h, Segment Limit = 1000h
MOV AX, 200h ; Offset Address
; Linear Address = 30000h + 200h = 30200h
Configuration of Task 2:
; Segment descriptor in LDT2
; Segment Base Address = 40000h, Segment Limit = 1000h
MOV AX, 200h ; Offset Address
; Linear Address = 40000h + 200h = 40200h
Configuration of Task 3:
; Segment descriptor in LDT3
; Segment Base Address = 50000h, Segment Limit = 1000h
MOV AX, 200h ; Offset Address
; Linear Address = 50000h + 200h = 50200h
Results: Although all three programs access the offset address 200h, they obtain different linear addresses due to using different segment descriptors (different segment base addresses):
- Task 1: 30200h
- Task 2: 40200h
- Task 3: 50200h
Detailed Structure of Segment Descriptors
A segment descriptor contains the following important fields:
31 23 15 7 0
+-----------------+-----------------+-----------------+-----------------+
| Base 31:24 | Flags | Base 23:16 | Access Rights | High 32 bits
+-----------------+-----------------+-----------------+-----------------+
| Segment Base 15:0 | Segment Limit 15:0 | Low 32 bits
+-----------------+-----------------+-----------------+-----------------+
Key Field Descriptions:
- Base (32 bits): Defines the starting position of the segment in the linear address space
- Segment Limit (20 bits): Defines the size of the segment
- Type Field: Specifies the type of segment (code segment, data segment, etc.) and access rights
- Privilege Level (DPL): Levels 0-3, with level 0 being the highest privilege
- Segment Present Flag (P): Indicates whether the segment is in memory
- Granularity Flag (G): 0=byte granularity, 1=4KB page granularity
Complete Address Conversion Process
; Example: Accessing Logical Address DS:200h
; 1. Get the segment selector from DS
; Assume DS = 001Bh (binary: 0000000000011011)
; - Index = 0011b = 3 (index in the descriptor table)
; - TI = 1 (using LDT instead of GDT)
; - RPL = 11b = 3 (Requested Privilege Level)
; 2. Select the descriptor table based on the TI bit
; TI=1, using the current task's LDT
; 3. Look up the 3rd descriptor in the LDT
; Descriptor Location = LDT Base Address + Index × 8
; 4. Read the segment base address from the descriptor (assumed to be 30000h)
; 5. Calculate the linear address
; Linear Address = Segment Base Address 30000h + Offset Address 200h = 30200h
Paging Mechanism (Optional Second Step)
If paging is enabled, the linear address needs to be further converted to a physical address:
Logical Address → Linear Address → Physical Address
Paging Conversion Process:
- Split the linear address into: Page Directory Index (10 bits) + Page Table Index (10 bits) + Page Offset (12 bits)
- Find the page directory using the CR3 register
- Find the page table based on the page directory index
- Find the physical page frame based on the page table index
- Add the page offset to get the physical address
Conclusion
Through the segmentation mechanism, the x86 processor achieves:
- Memory Isolation: Each task has its own address space
- Address Conversion: Logical addresses are converted to linear addresses via segment descriptors
- Access Protection: Protects system resources through privilege levels and type fields
- Virtual Memory: Supports a larger address space than physical memory through paging
This mechanism ensures that in a multitasking environment, even if multiple programs use the same offset address, they access different memory locations, thus achieving true memory isolation.
