According to the financial reports of companies in the first half of the year, by 2025, analog chips are emerging from a cyclical low and accelerating their recovery. Facing a series of emerging scenarios such as artificial intelligence, automotive electrification, communication technology evolution, and photovoltaic technology upgrades, domestic manufacturers are innovating from multiple dimensions including product performance, process collaboration, design methodology, and packaging, gradually penetrating into high-end fields where market participation has been insufficient.
Emerging fromthe V-shapedlow, new momentum is emerging
The global market size for analog chips reached a recent high in2022 and has followed a “V-shaped” curve. Data from WSTS (World Semiconductor Trade Statistics) shows that from 2023 to 2024, the market size for analog ICs is expected to decline year by year, but the decline in 2024 is projected to be narrower than in 2023. In the first half of 2025, the market size for analog ICs is expected to recover moderately by4%, with an anticipated year-on-year growth of3.3%, and a further increase of5.1% is expected in 2026.

Source: China Electronics News based onWSTS historical forecasts
Artificial intelligence is seen as a new driving force for the recovery of analog chip demand.
In cloud-basedAI deployments, AI servers, AIDC (AI Data Centers), and other computing infrastructure are facing severe energy consumption challenges, leading to increased requirements for the quantity and performance of power management chips and other analog ICs. Naxin Micro stated in its 2025 mid-year report that AI servers, due to their ultra-high computing density, parallel processing architecture, and stringent energy efficiency requirements, have created a demand for analog chips that far exceeds that of traditional servers, such as high-density power supply and high-speed data acquisition and transmission, which significantly increases the demand for power management chips and signal chain chips.
On the edge side,AI is also opening up incremental space for analog ICs. Aiwai Electronics’ 2025 mid-year report shows that the intelligent upgrades of terminal devices such as smartphones, smart driving cars, and tablets require more efficient power management chips to support high-performance computing and prolonged usage. Additionally, the increasing number of sensors and data transmission in terminal devices also necessitates processing and transmission through analog chips, leading to a growing demand for high-performance, low-power analog chips.
The trends of electrification and intelligence in automobiles are increasing the usage of analog ICs per vehicle while also giving rise to new technological directions. Traditional fuel vehicles consume about160 chips, while pure electric vehicles, due to the demands of BMS (Battery Management System), OBC (On-Board Charger), DC-DC conversion, and motor drive modules, can require more than double the number of chips.
“Previously, automotive power supplies were mainlyDC-DC (Direct Current to Direct Current converters), LED drivers, etc. Now, dedicatedBMS (Battery Management System) chips have emerged, and some companies have achieved breakthroughs through fast charging technology. The intelligence of vehicles will also bring new demands, such as automotive-grade sensors and in-vehicle network chips, which were rarely found in cars before but have now become standard.” said Ma Shaoyu, head of the Technology Innovation Center at Naxin Micro, in an interview with China Electronics News.

The “Automotive Chip Application Visualization Scale Model” exhibited by the China Automotive Chip Industry Innovation Strategic Alliance at the 2025 Shanghai Auto Show
In the communication field, in addition to5G technology evolution driving the demand for analog chips in base stations and terminals, optical modules have also become a new growth point. SiRuPu stated in its 2025 mid-year performance briefing that as customer demand for wireless base stations gradually recovers, the share of core products such as AFE is expanding, and customer expansion is progressing smoothly, with optical module revenue nearly doubling year-on-year in the first half of 2025.
Moreover, new trends such as photovoltaic technology upgrades, accelerated industrialization of robotics, and growing demand for sensor products in the healthcare sector are injecting momentum into analog chips, accelerating the recovery of the industry.
High-end fields need breakthroughs, and product matrix and ecosystem still need improvement
Analog chips have complex performance indicators, few auxiliary tools in the design phase, high experience requirements, non-standard operations, multidisciplinary integration, and long testing cycles, resulting in high technical barriers and talent requirements. In recent years, domestic analog chip manufacturers have continuously improved in product performance, quality control, and customer service, but there are still gaps compared to international leading companies in market expansion, product lines, talent, and ecosystem.
First, there is a need to break into high-end fields. In industries such as industrial, automotive, and high-end consumer electronics, the market participation of domestic analog chip companies still needs to be enhanced. According to Frost & Sullivan data, in 2024, the CR10 (market share of the top ten companies) for China’s analog chips is expected to be38.1%, with overseas manufacturers accounting for33%; in the automotive analog chip segment, the CR10 share is86.1%, with overseas manufacturers accounting for84.3%.
Secondly, the product matrix is not complete enough. Aiwai Electronics mentioned in the risk section of its 2025 mid-year report that compared to the company’s existing1500 chip product models, international giants in the integrated circuit industry have tens of thousands of chip product models covering most downstream application fields. “If international giants adopt aggressive market competition strategies, it will create competitive pressure on the company.”
The high technical requirements and experience-dependent characteristics of analog chip technology make the demand for high-end talent even more urgent. According to a report by Debang Securities, the design of high-end analog chips has high technical barriers, and any small breakthrough requires significant effort. For example, in home appliances, it is necessary to fully consider high parameter derating, comprehensive stress control, multi-load control, multi-area control, reset, and other issues. Moreover, the mainland China’s chip industry started late, and there is a lack of talent reserves, requiring domestic analog chip manufacturers to invest heavily in R&D.
In addition, the ecosystem construction of analog IC companies and the industry still needs to be strengthened. Industry experts point out that while analog chips are less affected by the ecosystem than digital chips, the large number of domestic analog chip companies and the lack of leading enterprises have resulted in insufficient product quantity from “small and scattered” companies, making it difficult to achieve synergy in their respective solutions.
Focusing on core dimensions of emerging scenarios, grasping key innovation directions
Driven by both application scenarios and market space, domestic companies urgently need to seize the window period for entering emerging scenarios, adjust R&D directions based on the latest technical requirements, and form closer collaboration with upstream and downstream of the industry chain in process development, system-level packaging, and other aspects. Ma Shaoyu stated that the innovation and development of analog chips should focus on three key directions:
Focusing on emerging application scenarios is the core of grasping the technological trends of analog chips and driving technological innovation. Ma Shaoyu gave an example, stating that the explosion of AI has driven demand growth in the server and data center fields, and data centers have two core dimensions for power requirements: one is power density, as data centers require high volume to achieve higher power in limited space; the other is power efficiency, to reduce energy consumption costs.
“For many years, power management chips have been pursuing higher power density and efficiency. For example, a1000 watt power supply used to require a large volume, but now the degree of miniaturization has greatly improved; the application of wide bandgap semiconductor materials such as silicon carbide and gallium nitride is also aimed at solving energy efficiency and density issues.” Ma Shaoyu stated, “Therefore, innovations in power devices, circuit topology optimization, and packaging technology upgrades around emerging applications will be important trends.”
In terms of processes, BCD (Bipolar-CMOS-DMOS) hybrid technology is currently the mainstream process in the analog IC industry. Based on this, companies like Naxin Micro, EnruiPu, and Aiwai Electronics are promoting COT (Customer Own Tool) processes to strengthen collaboration with foundries, better optimize and customize chips. SiRuPu mentioned in its mid-year report that it is accelerating the construction of a 12-inch COT production line with its own process capabilities to enhance wafer-level production capacity and cost competitiveness. Aiwai Electronics stated that the COT process has made breakthrough progress during the reporting period, significantly enhancing the competitiveness of core product processes. Ma Shaoyu noted that there are currently three main trends in analog processes. First, higher voltage; in the automotive field, 48-volt systems and 800-volt high-voltage batteries are aimed at achieving the goals of “lightweight and high torque,” driving analog processes towards higher voltage, which is also one of the reasons Naxin Micro is promoting the COT process. Second, higher power density; chips can handle larger currents, which is a key reason for Naxin Micro’s development of customized processes; third, smaller chip sizes; in addition to BCD processes, the integration of specialty processes is also an important trend, such as integrating Hall elements, magnetoresistive elements, etc., which can enhance chip integration and performance.
In terms of design methodology, collaborative simulation capabilities will become an important trend, significantly improving the sufficiency of early verification, reducing R&D costs, and ensuring R&D quality. “We are building collaborative simulation capabilities from ‘system, packaging to chip’ in the engineering simulation field, allowing for early assessment of key indicators such as EMI (Electromagnetic Interference), reliability, thermal efficiency, etc., solving problems in the early stages and reducing subsequent iterations. Although this trend is not particularly evident in the analog chip field, I believe it is an important direction for the future. If we fall behind in design methodologies such as collaborative simulation, we may be overtaken by peers.” said Ma Shaoyu.
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