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Introduction
Current hardware security research has gone beyond the scope of “standalone cryptographic chips.” We need to examine hardware security from the perspective of open systems. Traditional hardware security mainly protects keys, while new security must protect not only keys but also software.
OSR has launched the “Fundamentals of Hardware Security” training course. This course consists of seven chapters with a total of sixteen lectures, systematically introducing hardware security-related attack techniques and anti-attack design techniques, as well as chip architecture design and security certification.
Hardware Security Series Course
Time: April – June 2020 (New content every week, stay tuned)
Chapter 1: Overview of Hardware Security (2 lectures, already available, click to review)
Chapter 2: Chip Security Design Techniques (4 lectures, already available, click to review)
Chapter 3: Side Channel Attack Techniques – From Theory to Practice
(3 lectures, already available, click to review)
Chapter 4: Fault Injection Attack Techniques – From Theory to Practice
(3 lectures, 3*20min, May 14)
Chapter 5: Introduction to Product Security Certification (1 lecture, 1*30min, May 21)
Chapter 6: Security and Testing of TLS Protocol (2 lectures, 2*20min, May 28)
Chapter 7: IoT Security Testing and Evaluation Laboratory Construction
(1 lecture, 1*20min, June 4)
Syllabus
Lecture 1: Introduction to the technical framework of hardware security: security threats and hardware security technology scanning. (Already available, click to review)
Lecture 2: Introduction to chip security risks and challenges in the IoT environment of the 5G era. (Already available, click to review)
Lectures 3-6: Introduction to the technologies involved in cryptographic chip design, including cryptographic IP, PUF, hardware security system construction, storage encryption, etc. (Already available, click to review)
Lectures 7-9:: Introduction to the principles and methods of side channel attacks, including oscilloscope usage methods, CPA principles, etc. Demonstration of side channel curve collection and storage using the OSR-2560 development board, completing AES algorithm side channel key recovery. (Already available, click to review)
Lectures 10-12:: Introduction to the principles and methods of fault injection, including fault injection methods and the principles of DFA for block cipher algorithms. Demonstration of AES DFA key recovery attack and length modification attack using the OSR-407 development board.
Lecture 13: Introduction to the security certification system for cryptographic products (chips, software, devices), assisting enterprises in understanding product certification requirements.
Lectures 14-15: Introduction to SSL/TLS security protocols and related vulnerabilities, and introduction to TLS security testing methods from the perspectives of protocol testing and fuzz testing.
Lecture 16: Introduction to security testing methods for IoT systems, including vulnerability scanning systems and implementation methods for both device side and cloud side. Introduction to security laboratory construction methods, including investments and planning in capabilities, equipment, and training.
1. Organizing Units
Organizer
Talent Exchange Center of the Ministry of Industry and Information Technology
Co-organizer
ZhiHui YanChuang
Undertaker
Jiangbei New Area IC Smart Valley
Shenzhen NiuChuang XinAn Technology Development Co., Ltd. (OSR)
2. Current Schedule
Chapter 4 Lectures 10-12: May 14, 15:00 (Free)
3. Content Outline
Last week aired Chapter 3 introducing side channel attack techniques, explaining the principles and methods of side channel attacks from theory to practice, including oscilloscope usage methods, CPA principles, etc. Demonstration of side channel curve collection and storage using the OSR-2560 development board, completing AES algorithm side channel key recovery.
This week will air Chapter 4, focusing on the principles and methods of fault injection, including fault injection methods and the principles of DFA for block cipher algorithms. Demonstration of AES DFA key recovery attack and length modification attack methods using the OSR-407 development board.
Lecture 10: Basics of Fault Injection
Concept of fault injection – Types of fault injection – Principles of fault injection
Lecture 11: AES Differential Fault Injection Attack
AES differential fault injection attack principles – OSR-407 voltage fault injection
Lecture 12: Software Logic Attacks
Electromagnetic fault injection attacks – Fault injection in software programs
Wang Zongyue
R&D Director of Shenzhen NiuChuang XinAn Technology Development Co., Ltd. (OSR)
PhD in Information Security from Shandong University, with main research directions including security analysis methods and protection technologies for cryptographic chips and modules, security evaluation technologies for smart terminal devices, and side channel analysis methods for cryptographic algorithms. Published multiple papers and led or participated in various security evaluations for terminal devices, including white-box cryptographic products, Trusted Execution Environment (TEE) systems, smart locks, smart speakers, etc.
5. How to Watch
1. Scan the QR code below, fill in the information and submit to enter the video link. (Free)
Kind Reminder: Please be sure to save the video link for watching online activities and replays.
2. How to join the interaction group?
Please scan the robot QR code below, add the friend, send the verification information “online activity,” and note your name and organization.
The robot will automatically add you to the live group for interaction and communication.
6. Company Introduction
Shenzhen NiuChuang XinAn Technology Development Co., Ltd. (OSR) was established in July 2014 and is a security company focused on “cryptography + hardware.” The company provides industry-leading chip security IP, security testing tools, and system security solutions. The purpose of founding OSR is to empower security for a world of “Internet of Everything.” OSR’s mission is to make core security technologies accessible, easy to use, and affordable, providing them to various devices such as IoT, medical, automotive, and wearable devices. We hope to help customers quickly establish security design and analysis capabilities through security IP and testing tools, fundamentally enhancing the security of their future products.
The company received the Shenzhen “Peacock Plan” entrepreneurial funding in 2015. In 2017, it was selected as a “Leading Team” in Nanshan District, Shenzhen. In 2018, it obtained the national high-tech enterprise and Shenzhen high-tech enterprise qualifications.
OSR has a professional hardware security attack and defense team led by more than a dozen PhDs from prestigious universities at home and abroad.
Recent Recommendations
01 Starting from April 28, every Friday at 19:00
[“Chip State” Series] Advanced Incubator Model and Semiconductor Investment Logic – Comprehensive Coverage (Click to Watch)
02 Starting from April 24, every Thursday at 15:00
[Hardware Security Series] Chapter 3 – Side Channel Attack Techniques (Click to Watch)
03 Starting from April 28, every Tuesday and Friday at 19:00
[Preparing for Job Season] This week’s “class” I invited: 203 methods to successfully impress interviewers! (Click to Watch)
04 Already aired
[Integrated Circuit Cutting-Edge Technology Series] Share to Earn Tuition! Cutting-edge technology in integrated circuits is now hot online (Click to Watch)
05 Already aired
[Enterprise Micro Course Series] China Telecom 5G + Industrial Internet Helps Industry Resume Work and Production (Click to Watch)
Chip Power Talent Program
Contact Person: Wang Chen
Phone: 025-58262171
E-mail: [email protected]
Talent Exchange Center of the Ministry of Industry and Information Technology
Chip Power Talent Program
“Chip Power” Talent Program is organized by the Talent Exchange Center of the Ministry of Industry and Information Technology, serving the national integrated circuit industry development talent project, by integrating high-quality intellectual resources at home and abroad, building a communication platform for extensive participation and resource sharing among parks, enterprises, and talents, and constructing a vibrant and valuable cultural ecological environment for the integrated circuit industry.
IC Smart Valley
The “Chip Power” Talent Program has established “IC Smart Valleys” in some cities, jointly operated by the center and local governments, aiming to enhance the brand image of the integrated circuit industry in the city, achieve the gathering of integrated circuit industry talents and projects, and build a platform for learning, communication, cooperation, and entrepreneurship for integrated circuit talents in the region.
“Chip Power Talent Program
Helping the integration of learning, thinking, and creation for integrated circuit talents
IC Smart Valley
Resonating the three movements of gathering, retaining, and integrating high-end industrial talents
“Chip Power Talent Program”
Constructing a cultural ecological environment for the integrated circuit industry
