Analysis Report – A17 Pro SoC Chip

The A17 Pro leaves us with impressions of3nm and 19 billion transistors. Today, from CT scans to TEM slices, from FinFET cross-sections to DRAM wire bonding, even the 17 layers of metal interconnects have been meticulously measured. A total of 158 microscopic images answer one fundamental question:

Analysis Report - A17 Pro SoC Chip

What is the cost of an A17 Pro chip?

01 First, the conclusion: How much does Apple actually spend on an A17 Pro chip?

The complete cost range for the A17 Pro chip (including DRAM) is $56 to $67, which includes:

(1) The SoC die (109.6 mm²) accounts for $35 to $48.

(2) 8GB LPDDR5 (from SK Hynix) accounts for $14.5 to $17.

(3) InFO-PoP packaging + final testing totals approximately $7.

Note: This is just the “factory price” for materials + manufacturing + testing, excluding Apple’s self-developed IP, software, yield loss amortization, and profit.

02 What does the chip look like? Let’s disassemble it to find out.

Here are some key data points:

Item

Specification

Remarks

Process Node

TSMC 3nm FinFET (N3)

Mass production in December 2022, 77 lithography steps

Transistor Count

19 billion

3 billion more than A16, with a 2% reduction in area

Metal Layers

17 layers (16 Cu + 1 Al)

1 more layer than A16, allowing for high-density interconnects

Packaging Type

InFO-PoP, 1530 balls

479 fewer balls than A16, with a 6% reduction in size

DRAM

SK Hynix 8GB LPDDR5

4 die stacked + 2 dummy Si, totaling 8GB

(1) Die Area: 109.6 mm² (12.9mm × 8.5mm)

(2) Yield: Estimated at Medium Yield, each 300mm wafer can produce 446 good dies, with a cost of $38.9 per die.

03 Cost Breakdown: Where is the money spent?

① Front-End (Wafer Manufacturing)

(1) Wafer factory price: ~ $16,765 (including TSMC’s 60% gross margin)

(2) Major costs: Equipment depreciation accounts for 48%, followed by materials at 16%, and yield loss at 23%.

② Back-End 0 (Testing + Thinning + Dicing)

Probe testing, grinding, and mechanical sawing total $162 per wafer, which translates to only $0.3 per die.

③ InFO-PoP Packaging (TSMC foundry)

(1) Packaging factory quoted $625 per reconstructed wafer (280 chips)

(2) The cost per package is $2.78, plus final testing at $0.93.

④ DRAM (SK Hynix)

(1) Q4 2023 spot price is $14.9 per 8GB

(2) Apple’s procurement price is estimated at the market median, $14.5 to $17.

04 Area Map: Where are the 19B transistors stacked?

IP Block

Area

Percentage

Remarks

GPU 6-core

19.3mm²

17.4%

Each core is 2.81mm², 23% larger than A16 cores

Logic-1 (General Logic)

22.1mm²

9.9%

Largest independent unit

HP CPU 2-core + L2

11.4mm²

10.2%

Each core is 2.65 mm²

NPU 16-core

4.7mm²

4.3%

Physically, there are 8 blocks, each with dual cores

System-Level Cache L3

9.5mm²

8.6%

Divided into A/B areas

Other SRAM

14.5mm²

13.1%

A total of 24 MB L2/L3 scattered throughout

05 Process Shrink: Why is 3nm more expensive than 4nm?

TEM slices show the key dimensions of 3nm FinFET:

(1) Fin pitch 25nm (↓2nm)

(2) Gate pitch 45nm (↓3nm)

(3) Standard cell height 160nm (↓45nm)

(4) SRAM bit-cell 0.019µm² (↓21%)

Additional costs:

(1) Five additional masks (total of 77 layers)

(2) A new W (tungsten) capping layer added on top of HKMG to enhance work function control

(3) e-SiGe source/drain morphology changed to a “diamond” structure to improve hole mobility

06 Supply Chain List: The Journey of a Chip

Stage

Company/Location

Remarks

Wafer Foundry

TSMC Fab 18, Tainan

3nm FinFET, 60k WPM capacity

Probe Testing

Taiwan OSAT

-40~85 °C, 30.5 s/chip

InFO Packaging

TSMC, Taiwan

3 layers RDL + copper pillars + 9 IPD

DRAM

SK Hynix, South Korea

4 die stacked, wire-bonded

Final Testing

Taiwan OSAT

Same equipment as probe testing, $1836 k/set

07 Bonus: How does Apple “save money”?

1. Area compression: The die is only 109.6 mm², 2% smaller than A16, saving about $1.3 per chip.

2. Reduced ball count: BGA decreased from 2009 to 1530, synchronously lowering packaging substrate costs.

3. In-house IP development: GPU, NPU, and CPU are all proprietary, eliminating the need to pay IP royalties externally.

4. DRAM pricing negotiation: The price of 8GB LPDDR5 is about 10% lower than that of the Android camp.

08 In Conclusion

The cost of $56 to $67 for the A17 Pro is the result of the coupling of TSMC’s 3nm, SK Hynix memory, and Apple’s architecture. It is a “performance small nuclear bomb”; for the industry, it is a “report card for 3nm mass production”.

More related reports are available in my knowledge community, welcome everyone to further discuss in the community of Gyarados~

Analysis Report - A17 Pro SoC Chip

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