Process Node Process Type Technical Features 2nm Logic, Nanosheet (0.75V, shrink) Utilizes nanosheet technology with a 0.75V operating voltage and shrink characteristics, which helps improve chip integration and performance. 3nm Logic, Fin FET (0.75/1.2V, shrink)Logic, Fin FET (0.75/1.2V, Non-shrink) Based on Fin Field Effect Transistor technology, it offers different voltage combinations (0.75/1.2V) with both shrink … Read more
Source: Semiconductor Research Author: Guan Jian JamesG Introduction The 7nm process technology for chips is something we often hear about, but does 7nm really mean that the size of the chip is only 7nm? Let’s take a look! The image below is a classic cross-section diagram of a logic chip that I found online. From … Read more
In the fiercely competitive global market for mobile, consumer, and automotive electronic systems, low power consumption, high performance, and high reliability are critical factors for product success. To manage these conflicting demands, design teams need to consider a variety of options comprehensively, such as adopting advanced process technology nodes, particularly FinFET-based devices. These advanced technology … Read more
FPGA is a “reconfigurable logic” device. Chips are manufactured first, then “reconfigured” during redesign. ASICs do not require “reconfiguration”. You design it first, hand it over to the foundry, and then manufacture the chip. Now let’s take a look at the structure of these chips and how they differ. ● Logic Units: The Basic Module … Read more
To meet the needs of high-definition video and images, designers of display and camera SoCs need to use high-bandwidth interfaces to allow data to be transmitted at extremely fast speeds. MIPI D-PHY and C-PHY each have advantages in meeting these requirements, but if designers can use an integrated IP solution that operates in C-PHY mode … Read more