Currently, the only domain controllers that can be strictly defined as such are probably Audi A8’s zFAS and Tesla’s AP3.0. Many other domain controllers are essentially just virtual machines. Only those with Ethernet buses can truly be called real domain controllers. The core of a domain controller is the input system and Ethernet switch.
The image above shows the Tesla AP3.0 hardware board.
The estimated price of a single chip is 5000 RMB, and the estimated cost of the entire board is about 7500-8500 RMB (the price is greatly affected by the connectors, which are the most expensive components after the chip). The optional price is 56,000 RMB, and it is also possible that the price of FSD is much higher than my estimate. With Tesla’s production below a million units, the price of this FSD chip is at least 1500 each, which is very expensive. From the photo, the PCB is made by the American company TTM, and the AP3.0 is likely manufactured by Quanta Computer, the world’s largest notebook PC manufacturer, at their Shanghai Songjiang factory.
First, let’s talk about some peripheral and non-core components. The LPDDR4 is supplied by Micron. Based on the first line serial number, this is a chip produced in the second week of 2018 (8 indicates 2018, B indicates the 4th week, Micron only packages chips in even weeks). This is a D-Die chip (D represents D-Die, which is a relatively standard model in Micron’s product line). The 77 indicates the production and packaging locations; 7 represents Taiwan (5 represents mainland China). D9WCF corresponds to the model MT53D512M32D2DS-046AAT, where 53 indicates this is an LPDDR4 chip; D indicates a working voltage of 1.1V; 512M indicates the individual chip capacity is 512MB; 32 indicates the bit width of the single chip is 32bit; D2 indicates this chip is double-layer packaged, meaning there are two 512MB chips in one package, totaling 1GB; DS is the packaging number; 046 indicates the working frequency of this chip is 2133MHz; the first A indicates Automotive, automotive-grade chips; the following AT indicates Automotive Temperature.The GPS module is NEO-M8L-01A-81, with a horizontal accuracy circular error probability (CEP) of 2.5 meters, which is 1.5 meters with SBAS assistance. The GPS/QZSS/GLONASS/Beidou receiver’s CEP and RMS are units of GPS positioning accuracy (commonly known as precision). For example, a 2.5M CEP means that if you draw a circle with a radius of 2.5M, there is a 50% chance that a point will fall within that circle, meaning the GPS positioning has a 50% probability of being accurate to 2.5M. The corresponding RMS (66.7%) and 2DRMS (95%). Of course, many businesses only provide CEP for better-looking parameters. In reality, under 95% probability, the accuracy is 6 meters, and with SBAS assistance, it is 3.6 meters. This already exceeds a lane’s width. Cold start takes 26 seconds, hot start takes 1 second, and assisted start takes 3 seconds. It has a built-in simple 6-axis IMU with a refresh rate of 20Hz, and if produced in large quantities, the price will be below 300 RMB.The UFS is a new product from Toshiba, which began mass production in mid-2018, a standard automotive-grade UFS, AEC-Q100 grade 2, with a capacity of 32GB, lower than some complex automotive systems, suggesting Tesla’s algorithm model may not be large. MAX20025S is for powering the memory, and S512SD8H21 should be for Boot startup.On the right side of the Tesla board, from top to bottom, are the narrow FOV camera, fisheye camera, left and right A-pillar cameras, left and right B-pillar cameras, main camera, in-car DMS camera, rear camera, and GPS coaxial antenna. On the left side, from top to bottom, are the second power supply and I/O (which should be the vehicle’s LIN network), Ethernet diagnostic input, Ethernet diagnostic output, debugging USB, programming, main power supply, and I/O (chassis CAN network).Tesla used 3 pieces of Texas Instruments’ FPD-LINK, which are deserialization chips. Deserialization chips are usually paired, with serialization typically inside the camera and deserialization on the controller PCB. Two DS90UB960 chips correspond to DS90UB953-Q1, DS90UB935-Q1, DS90UB933-Q1, and DS90UB913A-Q1. The DS90UB960 has 4 lanes, and if it’s a MIPI CSI-2 port, each lane’s bandwidth can be set between 400Mbps and 1.6Gbps.It is important to explain the camera’s data formats, which are usually RAW RGB and YUV. There are three common levels of YUV: YUV444, YUV422, and YUV420. The formula for calculating bandwidth for RAW RGB is pixels x frame rate x bits x 4. For example, if a camera outputs 30Hz at 2 million pixels, the bandwidth is 2 million x 30 x 8 x 4, which equals 1.92Gbps, a very high bandwidth. YUV444 is pixels x frame rate x bits x 3, yielding 1.44Gbps; YUV422 is pixels x frame rate x bits x 2, yielding 0.96Gbps; YUV420 is pixels x frame rate x bits x 1.5, yielding 0.72Gbps. ADAS usually does not consider color much, so YUV420 is sufficient. Generally, YUV422 is used outside of automotive applications.The image above shows a typical application diagram for DS90UB960, which connects 4 2-megapixel cameras at 30Hz with YUV444 data, or 4 2-megapixel cameras at 60Hz with YUV420 data. The latter is more likely. DS90UB954 is a simplified version of DS90UB960, reducing from 4 lanes to 2 lanes. Generally, it pairs with DS90UB953. It is speculated that Tesla uses this chip for in-car driver state monitoring because the camera’s LVDS output is not suitable for long-distance transmission. Basically, every camera needs to be equipped with a deserialization chip to convert parallel data into serial, using coaxial or STP for transmission, allowing for longer distances and easier compliance with automotive EMI standards.The image above shows NVIDIA’s Pegasus framework diagram, which does not use Texas Instruments’ deserialization but rather Maxim’s GMSL. The two are very similar. NVIDIA uses 4 pieces of Maxim’s GMSL, each connecting 4 cameras. Maxim may have customized GMSL deserialization chips for NVIDIA. Currently, Maxim’s highest-level GMSL chip is MAX9296, with the corresponding chip in the camera being MAX9295. The maximum bandwidth is 12Gbps, which can only correspond to two 8-megapixel cameras. Among the mass-produced chips from Texas Instruments, the highest is DS90UB960, which can only correspond to a bandwidth of 6Gbps. The Pegasus should have a bandwidth of up to 24Gbps per chip, which should be very expensive. However, it can correspond to 16 8-megapixel cameras.This is a typical camera architecture for autonomous driving test vehicles, using 4 2-megapixel AR0231 cameras with Maxim’s MAX96705 serializer, connecting to one MAX9286 deserializer. It uses 2 8-megapixel AR0820 cameras with Maxim’s MAX9295 serializer, connecting to one MAX9296 (this chip is also very rare and almost unavailable on the market) deserializer. A single ASIC capable of handling this 6-channel 18Gbps bandwidth is very rare and would usually require two ASICs in cascade, although a single FPGA could also handle it.Here we can see that GMSL combined with MIPI CSI-2 corresponds to high-pixel ADAS applications, capturing the market, while Ethernet, which emphasizes higher performance, is rarely used. This is the competition between MIPI (LVDS, MIPI is a type of LVDS protocol) and Ethernet.The advantages of Ethernet are higher bandwidth, reliability that is two orders of magnitude better than LVDS, a very comprehensive link layer protocol, and better security and latency compared to LVDS. The bus topology is more flexible and easier to bridge and switch. However, for automotive engineers, in-vehicle Ethernet is a completely new concept, and engineers need a long time to explore and familiarize themselves with it. MIPI, on the other hand, is already very mature and almost monopolizes the automotive camera market, with engineers very familiar with its application, resulting in much shorter development cycles. Manufacturers standing on the side of Ethernet mainly include Marvell, Broadcom, Renesas, NXP, and most traditional networking communication manufacturers. On the side of LVDS are Texas Instruments and Maxim, with only these two capable of handling deserialization.In the Ethernet domain, there are very few PHY manufacturers with bandwidth exceeding 10Gbps. The most common is Aquantia, known for its 10G network cards, which cost $130 each. Marvell acquired the company in May 2019 for $452 million, betting on the future automotive 10Gbps PHY market.The next article will analyze the core architecture of the Tesla domain controller.
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