Author: Electronic Engineer Alliance
Source: Power Network Sphere Number
“A Comprehensive Breakdown of Low Power Design in Portable Product Development”
Introduction
The low power design of portable products is akin to how our parents managed their finances, where every penny must be meticulously accounted for to ensure that every expenditure is justified. Similarly, every mAh saved in low power products contributes to the product’s endurance and enhances its competitiveness. The low power design of portable products is a systematic project that requires detailed consideration from multiple dimensions, including system architecture, hardware selection, software optimization, and power management, while also integrating usage scenarios and user habits for refined design. In simple terms, it’s about saving a bit here and cutting back a bit there, with the more savings, the better. Today, we will briefly discuss this topic in hopes of providing some insights.
1.System-Level Optimization
1. Processor/Main Control Selection
Traditional low power processors include the MSP430FR series and STM32L series. For example, the MSP430 is commonly used in e-ink displays;
MSP430FR Series (FRAM Memory)
Operating Mode: 100μA/MHz
Standby Mode (LPM3): 0.4μA
STM32L5 Series (Cortex-M33)
Operating Mode: 40μA/MHz
Stop Mode (RTC Retained): 1.2μA
STM32U5 Series (Cortex-M33)
Stop Mode (Full RAM Retained): 350nA
Dynamic Power Consumption: 19μA/MHz
Wireless transmission functions in portable products are also quite common, such as Bluetooth, Wi-Fi, Zigbee, etc.;
CC2652R (Wireless MCU)
Supports Bluetooth 5.2/Zigbee/Thread
Receive Mode: 5.4mA, Deep Sleep: 0.9μA
nRF54 Series (Cortex-M33)
Dynamic Power Consumption: 25μA/MHz
Deep Sleep: 0.6μA (RTC Retained)
Supports Bluetooth 5.4/Thread/Zigbee
2. Work Mode Division
Define different working modes (running, standby, sleep, shutdown) based on product requirements, and at appropriate times, switch modes through state machine management to ensure that the power consumption is minimized under current conditions.
3. Power Domain Division
Divide the system into independently powered power domains, controlling power on and off through MOSFETs or load switches. I previously used the DIO7299 for load switching. Power can be controlled according to the “on-demand power supply” strategy, for example, for Bluetooth, GPS, and other modules.
4. Dynamic Voltage and Frequency Scaling (DVFS)
Adjust the CPU/GPU operating voltage and frequency dynamically based on load to reduce dynamic power consumption. Many processors now integrate PMU functions internally, allowing for timely adjustments to the processor’s operating voltage based on demand.
2.Hardware Design Details
1. Component Selection
Select power chips with low quiescent current (IQ) (such as LDOs, DC-DC).
Use low power sensors (such as MEMS accelerometers) and low leakage analog devices.
Avoid high power interfaces (such as parallel buses), and prioritize low power serial interfaces like SPI and I²C.
In summary, choose components with lower power consumption.
2. Power Management Circuit
Optimize power topology: high-frequency DC-DC converters for high load scenarios, LDOs for low noise sensitive circuits.
Add energy storage capacitors or supercapacitors to meet instantaneous high current demands and avoid frequent power awakenings.
Design low power reset circuits and watchdogs to avoid power surges in abnormal states.
3. Sensor and Peripheral Circuit Optimization
Configure interrupt wake-up functions for sensors to reduce polling operations.
Optimize the signal chain: shorten high impedance analog circuit traces to reduce leakage current.
Use PWM dimming or time multiplexing for high current devices like LEDs and screens.
4. PCB Layout and Signal Integrity
Reduce the length of high-frequency signal lines to lower EMI and power consumption caused by crosstalk.
Optimize power traces to reduce IR Drop (e.g., using wide copper foil and multiple ground points).
Configure unused GPIO pins to fixed levels to avoid leakage from floating states.
5. Battery and Charging Management
Select high energy density batteries (such as lithium polymer) and match suitable charge and discharge chips.
Design temperature protection and overcharge/overdischarge protection circuits to extend battery life.
Support low power charging modes (such as trickle charging).
3.Software Optimization Strategies
1. Algorithm and Task Scheduling
Simplify algorithm complexity (e.g., use lookup tables instead of real-time calculations).
Adopt an event-driven architecture to reduce polling and blocking waits.
Batch task execution (e.g., process sensor data in bulk).
2. Communication Protocol Optimization
Shorten the activation time of wireless modules (e.g., BLE, Wi-Fi) and use fast connection technologies.
Optimize data transmission protocols (e.g., increase data compression, reduce ACK counts).
Completely turn off RF module power when there is no communication demand.
3. Utilizing Low Power Modes
Quickly enter deep sleep during idle times (e.g., ARM’s WFI/WFE instructions).
Use RTC or external interrupts to wake up, avoiding frequent timer interrupts.
Turn off unused peripheral clocks (e.g., by configuring registers to disable ADC clocks).
4. Data Buffering and Caching
Use FIFO or DMA to transfer data, reducing CPU intervention time.
Cache data locally and upload in batches to reduce wireless module activation times.
5. Firmware and Driver Optimization
Avoid busy waiting in firmware, using interrupts or event triggers instead.
Optimize driver layer code to reduce redundant operations (e.g., multiple initializations of peripherals).
Support remote firmware upgrades to continuously optimize power consumption algorithms.
4.System Monitoring and Debugging
1. Real-Time Power Monitoring
Use high-precision ammeters (e.g., Nordic Power Profiler) to analyze power consumption of each module.Record power consumption curves under typical scenarios (e.g., standby, running, communication).
2. Power Consumption Analysis Tools
Use simulation tools (e.g., SPICE) to analyze power path efficiency.
Utilize static code analysis tools to locate high power consumption code segments in software.
3. Testing and Validation
Cover extreme scenario testing (e.g., low temperature, low battery).
Validate leakage current in sleep mode (e.g., target <10μA).
Conduct long-term aging tests to ensure battery degradation does not affect low power design. For example, based on the product specifications for expected lifespan, daily usage frequency and duration, and product power consumption, estimate the degradation of battery capacity over the expected number of charge and discharge cycles, and whether it can still meet the promised endurance period.
5.User Scenario and Habit Adaptation
1. Adaptive Power Consumption Strategy
Adjust detection frequency dynamically based on device functionality and user habits (e.g., less operation at night). Provide an “energy-saving mode” option, allowing users to manually adjust measurement parameters to reduce power consumption and extend battery life.
2. Environmental Awareness
Use sensors like light sensors and accelerometers to determine device status (e.g., stationary, in transit) and adjust power consumption strategies accordingly, such as adjusting screen brightness based on ambient light levels. For example, determine sensor sampling frequency based on the device’s motion state.
6.Supply Chain and Cost Balance
Balance low power design with BOM costs (e.g., selecting cost-effective PMICs).
Consider the stability of component supply to avoid being forced to switch to high power alternatives due to shortages.
Through the above comprehensive and detailed points, we have outlined the various design aspects that need to be considered for low power design, and I believe everyone should now have a comprehensive understanding of low power design. I hope this can help everyone.
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