

Chip Design


1
Specification Definition
2
System-Level Design
3
Front-End Design
4
Back-End Design



Chip Manufacturing


1. Purification: Sand/quartz is deoxygenated and purified to obtain silicon dioxide with a silicon content of 25%. It is then refined in an electric arc furnace, chlorinated with hydrochloric acid, and distilled to obtain crystalline silicon with a purity of over 99%.
2. Ingot Manufacturing: Crystalline silicon is melted at high temperatures and stretched by rotation, undergoing neck growth, crown growth, crystal growth, and tail growth to obtain a complete ingot.
3. Slicing: The ingot is cut horizontally using a thin saw blade embedded with diamond particles on the inner diameter edge to produce wafers of consistent thickness.
4. Polishing: The appearance of the wafer is polished to remove saw marks and damage caused during cutting, achieving the required smoothness of the wafer surface.
5. Oxidation: The surface undergoes oxidation and chemical vapor deposition, which serves as an auxiliary layer for later processes and helps isolate electrical devices to prevent short circuits.
6. Photolithography and Etching: A layer of photoresist is spin-coated onto the oxidized wafer surface, exposed, and then developed to reveal the circuit pattern. Chemical reactions or plasma bombardment are then used to transfer the circuit pattern onto the wafer surface.
7. Ion Implantation and Annealing: Impurity ions are bombarded into the semiconductor lattice, and the ion-implanted semiconductor is heated at a certain temperature to activate the different electrical properties of the semiconductor material.
8. Vapor Deposition and Plating: Vapor deposition is used to form various metal and insulating layers, while plating is specifically used for growing copper wiring layers.
9. Chemical Mechanical Polishing: A combination of chemical etching and mechanical polishing is used for polishing.
10. Finally, multiple layers of circuits and components are processed and manufactured on the wafer.
11. Wafer Probing Process: Each die is tested for its electrical characteristics using a probe tester, discarding any non-compliant dies.


Chip Packaging and Testing


1. Back Thinning: The wafer is thinned on the back to reach the thickness required for packaging.
2. Wafer Cutting: The wafer is cut into individual dice, which are then cleaned.
3. Optical Inspection: Check for defects.
4. Chip Bonding: Chips are bonded, silver paste is cured (to prevent oxidation), and wire bonding is performed.
5. Molding: To prevent external impacts, the product is encapsulated with EMC (epoxy molding compound) while being heated to cure.
6. Laser Marking: The production date, batch number, and other information are engraved on the product.
7. High-Temperature Curing: Protects the internal structure of the IC and eliminates internal stress.
8. Excess Material Removal: Trimming the edges.
9. Plating: Improves conductivity and enhances solderability.
10. Inspection of sliced and molded products for defects.
11. Chip Testing: Divided into general testing and special testing; general testing checks the electrical characteristics of the chip, classifying them into different grades based on electrical characteristics. Special testing is targeted testing to see if it meets specific customer requirements.
12. Qualified products are labeled with specifications, model numbers, and production dates, packaged, and then shipped.


Final Thoughts


Editor: Six Dollar Fish